49 #define I2C_MAX_WAIT_TIME (RTIMER_SECOND / 10) 51 #define LIMITED_BUSYWAIT(cond) do { \ 52 rtimer_clock_t end_time = RTIMER_NOW() + I2C_MAX_WAIT_TIME; \ 54 if(!RTIMER_CLOCK_LT(RTIMER_NOW(), end_time)) { \ 60 #define NO_INTERFACE 0xFF 62 static uint8_t slave_addr = 0x00;
63 static uint8_t
interface = NO_INTERFACE;
69 if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
70 != PRCM_DOMAIN_POWER_ON) {
75 if(!(HWREG(PRCM_BASE + PRCM_O_I2CCLKGR) & PRCM_I2CCLKGR_CLK_EN)) {
86 ti_lib_prcm_power_domain_on(PRCM_DOMAIN_SERIAL);
87 while((ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
88 != PRCM_DOMAIN_POWER_ON));
91 ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_I2C0);
92 ti_lib_prcm_load_set();
93 while(!ti_lib_prcm_load_get());
96 ti_lib_i2c_master_init_exp_clk(I2C0_BASE, ti_lib_sys_ctrl_clock_get(),
105 status = ti_lib_i2c_master_err(I2C0_BASE);
106 if(status & (I2C_MSTAT_DATACK_N_M | I2C_MSTAT_ADRACK_N_M)) {
107 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_ERROR_STOP);
110 return status == I2C_MASTER_ERR_NONE;
116 interface = NO_INTERFACE;
119 ti_lib_i2c_master_disable(I2C0_BASE);
122 ti_lib_prcm_peripheral_run_disable(PRCM_PERIPH_I2C0);
123 ti_lib_prcm_load_set();
124 while(!ti_lib_prcm_load_get());
138 ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_SDA);
139 ti_lib_ioc_io_port_pull_set(BOARD_IOID_SDA, IOC_IOPULL_UP);
151 ti_lib_i2c_master_slave_addr_set(I2C0_BASE, slave_addr,
false);
154 ti_lib_i2c_master_data_put(I2C0_BASE, data[0]);
157 LIMITED_BUSYWAIT(ti_lib_i2c_master_bus_busy(I2C0_BASE));
160 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START);
161 LIMITED_BUSYWAIT(ti_lib_i2c_master_busy(I2C0_BASE));
162 success = i2c_status();
164 for(i = 1; i < len && success; i++) {
166 ti_lib_i2c_master_data_put(I2C0_BASE, data[i]);
169 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);
170 LIMITED_BUSYWAIT(ti_lib_i2c_master_busy(I2C0_BASE));
171 success = i2c_status();
178 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH);
179 LIMITED_BUSYWAIT(ti_lib_i2c_master_busy(I2C0_BASE));
180 success = i2c_status();
181 LIMITED_BUSYWAIT(ti_lib_i2c_master_bus_busy(I2C0_BASE));
191 ti_lib_i2c_master_slave_addr_set(I2C0_BASE, slave_addr,
false);
194 ti_lib_i2c_master_data_put(I2C0_BASE, data);
197 LIMITED_BUSYWAIT(ti_lib_i2c_master_bus_busy(I2C0_BASE));
200 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_SINGLE_SEND);
201 LIMITED_BUSYWAIT(ti_lib_i2c_master_busy(I2C0_BASE));
213 ti_lib_i2c_master_slave_addr_set(I2C0_BASE, slave_addr,
true);
216 LIMITED_BUSYWAIT(ti_lib_i2c_master_bus_busy(I2C0_BASE));
219 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START);
223 while(i < (len - 1) && success) {
224 LIMITED_BUSYWAIT(ti_lib_i2c_master_busy(I2C0_BASE));
225 success = i2c_status();
227 data[i] = ti_lib_i2c_master_data_get(I2C0_BASE);
228 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_CONT);
234 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
235 LIMITED_BUSYWAIT(ti_lib_i2c_master_busy(I2C0_BASE));
236 success = i2c_status();
238 data[len - 1] = ti_lib_i2c_master_data_get(I2C0_BASE);
239 LIMITED_BUSYWAIT(ti_lib_i2c_master_bus_busy(I2C0_BASE));
253 ti_lib_i2c_master_slave_addr_set(I2C0_BASE, slave_addr,
false);
256 ti_lib_i2c_master_data_put(I2C0_BASE, wdata[0]);
259 LIMITED_BUSYWAIT(ti_lib_i2c_master_bus_busy(I2C0_BASE));
262 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START);
263 LIMITED_BUSYWAIT(ti_lib_i2c_master_busy(I2C0_BASE));
264 success = i2c_status();
266 for(i = 1; i < wlen && success; i++) {
268 ti_lib_i2c_master_data_put(I2C0_BASE, wdata[i]);
271 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);
272 LIMITED_BUSYWAIT(ti_lib_i2c_master_busy(I2C0_BASE));
273 success = i2c_status();
280 ti_lib_i2c_master_slave_addr_set(I2C0_BASE, slave_addr,
true);
283 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START);
286 while(i < (rlen - 1) && success) {
287 LIMITED_BUSYWAIT(ti_lib_i2c_master_busy(I2C0_BASE));
288 success = i2c_status();
290 rdata[i] = ti_lib_i2c_master_data_get(I2C0_BASE);
291 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_CONT);
297 ti_lib_i2c_master_control(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
298 LIMITED_BUSYWAIT(ti_lib_i2c_master_busy(I2C0_BASE));
299 success = i2c_status();
301 rdata[rlen - 1] = ti_lib_i2c_master_data_get(I2C0_BASE);
302 LIMITED_BUSYWAIT(ti_lib_i2c_master_bus_busy(I2C0_BASE));
312 slave_addr = address;
314 if(accessible() ==
false) {
318 if(new_interface != interface) {
319 interface = new_interface;
321 ti_lib_i2c_master_disable(I2C0_BASE);
323 if(interface == BOARD_I2C_INTERFACE_0) {
324 ti_lib_ioc_io_port_pull_set(BOARD_IOID_SDA, IOC_NO_IOPULL);
326 ti_lib_ioc_pin_type_i2c(I2C0_BASE, BOARD_IOID_SDA,
BOARD_IOID_SCL);
329 }
else if(interface == BOARD_I2C_INTERFACE_1) {
333 ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_SDA);
338 ti_lib_i2c_master_init_exp_clk(I2C0_BASE, ti_lib_sys_ctrl_clock_get(),
void board_i2c_shutdown()
Stops the I2C peripheral and restores pins to s/w control.
bool board_i2c_read(uint8_t *data, uint8_t len)
Burst read from an I2C device.
#define BOARD_IOID_SDA_HP
Interface 1 SDA: MPU.
Header file with macros which rename TI CC26xxware functions.
Header file for the Sensortag I2C Driver.
bool board_i2c_write_read(uint8_t *wdata, uint8_t wlen, uint8_t *rdata, uint8_t rlen)
Write and read in one operation.
bool board_i2c_write_single(uint8_t data)
Single write to an I2C device.
bool board_i2c_write(uint8_t *data, uint8_t len)
Burst write to an I2C device.
Header file for the real-time timer module.
void board_i2c_select(uint8_t new_interface, uint8_t address)
Select an I2C slave.
#define BOARD_IOID_SCL
I2C IOID mappings.
void board_i2c_wakeup()
Enables the I2C peripheral with defaults.
#define BOARD_IOID_SCL_HP
Interface 1 SCL: MPU.