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#define | __CM0_CMSIS_VERSION_MAIN (0x04U) |
CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions CMSIS violates the following MISRA-C:2004 rules: More... | |
#define | __CM0_CMSIS_VERSION_SUB (0x1EU) |
#define | __CM0_CMSIS_VERSION |
#define | __CORTEX_M (0x00U) |
#define | __FPU_USED 0U |
__FPU_USED indicates whether an FPU is used or not. More... | |
#define | __I volatile const |
#define | __O volatile |
#define | __IO volatile |
#define __CM0_CMSIS_VERSION |
CMSIS HAL version number
Definition at line 76 of file core_cm0.h.
#define __CM0_CMSIS_VERSION_MAIN (0x04U) |
CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions CMSIS violates the following MISRA-C:2004 rules:
Definition at line 74 of file core_cm0.h.
#define __CM0_CMSIS_VERSION_SUB (0x1EU) |
[15:0] CMSIS HAL sub version
Definition at line 75 of file core_cm0.h.
#define __CORTEX_M (0x00U) |
Cortex-M Core
Definition at line 79 of file core_cm0.h.
#define __FPU_USED 0U |
__FPU_USED indicates whether an FPU is used or not.
This core does not support an FPU at all
Definition at line 124 of file core_cm0.h.
#define __I volatile const |
Defines 'read only' permissions
Definition at line 210 of file core_cm0.h.
#define __IO volatile |
Defines 'read / write' permissions
Definition at line 213 of file core_cm0.h.
#define __O volatile |
Defines 'write only' permissions
Definition at line 212 of file core_cm0.h.