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The TI SimpleLink CC13xx and CC26xx SoC

This group documents the TI CC13xx and CC26xx CPUs. More...

Modules

 CC13xx/CC26xx GPIO HAL implementation
 
 CC13xx/CC26xx I2C HAL
 
 CC13xx/CC26xx IEEE Address Control
 Driver for the retrieval of an IEEE address from flash.
 
 CC13xx/CC26xx SPI HAL
 
 CC13xx/CC26xx clock implementation
 
 CC13xx/CC26xx master interrupt manipulation
 Master interrupt manipulation routines for CC13xx/CC26xx.
 
 CC13xx/CC26xx watchdog timer driver.
 
 Customer Configuration (CCFG)
 
 Pseudo Random Number Generator (PRNG) for CC13xx/CC26xx.
 Implementation based on Bob Jenkins' small noncryptographic PRNG.
 
 RF settings for CC13xx/CC26xx
 
 RF specific files for CC13xx/CC26xx
 
 SLIP for CC13xx/CC26xx.
 
 TX power functioanlity for CC13xx/CC26xx
 
 The CC13xx/CC26xx rtimer
 Implementation of the rtimer module for CC13xx/CC26xx.
 
 True Random Number Generator for CC13xx/CC26xx.
 
 UART for CC13xx/CC26xx.
 This particular driver utilizes the UART0 peripheral specifically.
 

Files

 
 
file  startup_cc13xx_cc26xx_gcc.c
 Startup file for GCC for CC13xx/CC26xx.
 
file  startup_cc13xx_cc26xx_iar.c
 Startup file for IAR for CC13xx/CC26xx.
 

Functions

static void debugHardfault (uint32_t *sp)
 
void debugStackPointer (uint32_t *sp)
 

Board Configuration.

#define BOARD_CONF_HAS_SENSORS   0
 
#define BOARD_CONF_SENSORS_DISABLE   0
 

Watchdog Configuration.

#define WATCHDOG_CONF_DISABLE   0
 
#define WATCHDOG_CONF_TIMEOUT_MS   1000
 

RF configuration.

#define RF_CONF_INACTIVITY_TIMEOUT   2000
 2 ms
 
#define RF_CONF_TXPOWER_DBM   RF_TXPOWER_MAX_DBM
 
#define RF_CONF_BLE_TXPOWER_DBM   RF_TXPOWER_MAX_DBM
 
#define RF_CONF_TXPOWER_BOOST_MODE   0
 
#define RF_SUB_1_GHZ_FRONT_END_MODE   RF_FRONT_END_MODE_DIFFERENTIAL
 
#define RF_SUB_1_GHZ_BIAS_MODE   RF_BIAS_MODE_INTERNAL
 
#define RF_2_4_GHZ_FRONT_END_MODE   RF_FRONT_END_MODE_DIFFERENTIAL
 
#define RF_2_4_GHZ_BIAS_MODE   RF_BIAS_MODE_INTERNAL
 
#define RF_CONF_RX_BUF_CNT   4
 
#define RF_CONF_RX_BUF_SIZE   146
 
#define RF_CONF_BLE_BEACON_ENABLE   0
 

IEEE address configuration. Used to generate our link-local and

global IPv6 addresses.

#define IEEE_ADDR_CONF_HARDCODED   0
 Location of the IEEE address. More...
 
#define IEEE_ADDR_CONF_ADDRESS   { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
 The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED is defined as 1. More...
 

IEEE-mode configuration.

#define IEEE_MODE_CONF_AUTOACK   1
 Configuration to enable/disable auto ACKs in IEEE-mode. More...
 
#define IEEE_MODE_CONF_PROMISCOUS   0
 Configuration to enable/disable frame filtering in IEEE-mode. More...
 
#define IEEE_MODE_CONF_CCA_RSSI_THRESHOLD   0xA6
 Configuration to set the RSSI threshold in dBm in IEEE-mode. More...
 

Prop-mode configuration.

#define PROP_MODE_CONF_DW   0
 Configuration to set whitener in Prop-mode. More...
 
#define PROP_MODE_CONF_USE_CRC16   0
 Use 16-bit or 32-bit CRC in Prop-mode. More...
 
#define PROP_MODE_CONF_CCA_RSSI_THRESHOLD   0xA6
 Configuration to set the RSSI threshold in dBm in Prop-mode. More...
 

TI Drivers Configuration.

#define TI_UART_CONF_ENABLE   1
 Enable or disable UART driver.
 
#define TI_UART_CONF_UART0_ENABLE   TI_UART_CONF_ENABLE
 Enable or disable UART0 peripheral.
 
#define TI_UART_CONF_UART1_ENABLE   0
 Enable or disable UART1 peripheral.
 
#define TI_UART_CONF_BAUD_RATE   115200
 UART driver baud rate configuration.
 
#define TI_SPI_CONF_ENABLE   1
 Enable or disable SPI driver.
 
#define TI_SPI_CONF_SPI0_ENABLE   TI_SPI_CONF_ENABLE
 Enable or disable SPI0 peripheral.
 
#define TI_SPI_CONF_SPI1_ENABLE   0
 Enable or disable SPI1 peripheral.
 
#define TI_I2C_CONF_ENABLE   1
 Enable or disable I2C driver.
 
#define TI_I2C_CONF_I2C0_ENABLE   TI_I2C_CONF_ENABLE
 Enable or disable I2C0 peripheral.
 
#define TI_NVS_CONF_ENABLE   0
 Enable or disable Non-Volatile Storage (NVS) driver.
 
#define TI_NVS_CONF_NVS_INTERNAL_ENABLE   TI_NVS_CONF_ENABLE
 Enable or disable internal flash storage.
 
#define TI_NVS_CONF_NVS_EXTERNAL_ENABLE   TI_NVS_CONF_ENABLE
 Enable or disable external flash storage.
 
#define TI_SD_CONF_ENABLE   0
 Enable or disable SD driver.
 

SPI HAL configuration.

CC13x0/CC26x0 has one SPI interface, while CC13x2/CC26x2 has two SPI interfaces.

Some additional checks has to be made for the SPI_CONF_CONTROLLER_COUNT configuration, as this relies on whether the available SPI interfaces are enabled or not, as well as if the SPI driver is enabled at all.

#define SPI0_IS_ENABLED   ((TI_SPI_CONF_SPI0_ENABLE) ? 1 : 0)
 
#define SPI1_IS_ENABLED   ((TI_SPI_CONF_SPI1_ENABLE) ? 1 : 0)
 
#define SPI_CONF_CONTROLLER_COUNT   (SPI0_IS_ENABLED)
 

Different modes the RF can operate on, denoted by which frequency

band said mode operates on.

Currently supports the following modes:

  • Sub-1 GHz, called prop-mode
  • 2.4 GHz, called ieee-mode
#define RF_MODE_SUB_1_GHZ   (1 << 0)
 
#define RF_MODE_2_4_GHZ   (1 << 1)
 
#define RF_MODE_BM
 

The different front-end modes the CC13xx/CC26xx devices support. The

front-end mode can be configured independently of the bias mode.

The two types of modes are as follows:

  • Differential: Both RF_P and RF_N are used as a differential RF interface.
  • Single ended: Either the RF_P pin or the RF_N pin is used as the RF path.
#define RF_FRONT_END_MODE_DIFFERENTIAL   0
 
#define RF_FRONT_END_MODE_SINGLE_ENDED_RFP   1
 
#define RF_FRONT_END_MODE_SINGLE_ENDED_RFN   2
 

The different bias modes the CC13xx/CC26xx devices support. The

bias mode can be configured independently of the front-end mode.

The two different modes are as follows:

  • Internal bias: the LNA is biased by an internal bias.
  • External bias: the LNA is biased by an external bias.
#define RF_BIAS_MODE_INTERNAL   0
 
#define RF_BIAS_MODE_EXTERNAL   1
 

Detailed Description

This group documents the TI CC13xx and CC26xx CPUs.

The two CPU families are very similar, with the main difference being related to radio capability.

Documentation in this group should be considered to be applicable to both families, unless explicitly stated otherwise.

Macro Definition Documentation

◆ IEEE_ADDR_CONF_ADDRESS

#define IEEE_ADDR_CONF_ADDRESS   { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }

The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED is defined as 1.

Must be a byte array of size 8.

Definition at line 270 of file cc13xx-cc26xx-conf.h.

◆ IEEE_ADDR_CONF_HARDCODED

#define IEEE_ADDR_CONF_HARDCODED   0

Location of the IEEE address.

0 => Read from InfoPage. 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS.

Definition at line 262 of file cc13xx-cc26xx-conf.h.

◆ IEEE_MODE_CONF_AUTOACK

#define IEEE_MODE_CONF_AUTOACK   1

Configuration to enable/disable auto ACKs in IEEE-mode.

0 => ACK generated by software 1 => ACK generated by the radio.

Definition at line 286 of file cc13xx-cc26xx-conf.h.

◆ IEEE_MODE_CONF_CCA_RSSI_THRESHOLD

#define IEEE_MODE_CONF_CCA_RSSI_THRESHOLD   0xA6

Configuration to set the RSSI threshold in dBm in IEEE-mode.

Defaults to -90 dBm.

Definition at line 303 of file cc13xx-cc26xx-conf.h.

◆ IEEE_MODE_CONF_PROMISCOUS

#define IEEE_MODE_CONF_PROMISCOUS   0

Configuration to enable/disable frame filtering in IEEE-mode.

0 => Disable promiscous mode. 1 => Enable promiscous mode.

Definition at line 295 of file cc13xx-cc26xx-conf.h.

◆ PROP_MODE_CONF_CCA_RSSI_THRESHOLD

#define PROP_MODE_CONF_CCA_RSSI_THRESHOLD   0xA6

Configuration to set the RSSI threshold in dBm in Prop-mode.

Defaults to -90 dBm.

Definition at line 336 of file cc13xx-cc26xx-conf.h.

◆ PROP_MODE_CONF_DW

#define PROP_MODE_CONF_DW   0

Configuration to set whitener in Prop-mode.

0 => No whitener 1 => Whitener.

Definition at line 319 of file cc13xx-cc26xx-conf.h.

◆ PROP_MODE_CONF_USE_CRC16

#define PROP_MODE_CONF_USE_CRC16   0

Use 16-bit or 32-bit CRC in Prop-mode.

0 => 32-bit CRC. 1 => 16-bit CRC.

Definition at line 328 of file cc13xx-cc26xx-conf.h.

Function Documentation

◆ debugHardfault()

static void debugHardfault ( uint32_t *  sp)
static

< R0 register

< R1 register

< R2 register

< R3 register

< R12 register

< LR register

< PC register

< PSR register

Definition at line 217 of file startup_cc13xx_cc26xx_gcc.c.

◆ debugStackPointer()

void debugStackPointer ( uint32_t *  sp)

< R0 register

< R1 register

< R2 register

< R3 register

< R12 register

< LR register

< PC register

< PSR register

Definition at line 258 of file startup_cc13xx_cc26xx_iar.c.