Contiki-NG
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sys-ctrl.c
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1/*
2 * Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * 3. Neither the name of the copyright holder nor the names of its
15 * contributors may be used to endorse or promote products derived
16 * from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
29 * OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31/**
32 * \addtogroup cc2538-sys-ctrl
33 * @{
34 *
35 * \file
36 * Implementation of the cc2538 System Control driver
37 */
38#include "contiki.h"
39#include "reg.h"
40#include "cpu.h"
41#include "dev/sys-ctrl.h"
42#include "dev/gpio.h"
43#include "dev/ioc.h"
44
45#include <stdint.h>
46
47#if SYS_CTRL_OSC32K_USE_XTAL
48#define SYS_CTRL_OSCS 0
49#else
50#define SYS_CTRL_OSCS SYS_CTRL_CLOCK_CTRL_OSC32K
51#endif
52/*---------------------------------------------------------------------------*/
53int
55{
56 return (REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_RST) >>
57 SYS_CTRL_CLOCK_STA_RST_S;
58}
59/*---------------------------------------------------------------------------*/
60const char *
62{
63 static const char *reset_cause[] = {
64 "POR",
65 "External reset",
66 "WDT",
67 "CLD or software reset"
68 };
69
70 return reset_cause[sys_ctrl_get_reset_cause()];
71}
72/*---------------------------------------------------------------------------*/
73void
75{
76 uint32_t val;
77
78#if SYS_CTRL_OSC32K_USE_XTAL
79 /* Set the XOSC32K_Q pads to analog for crystal */
86#endif
87
88 /*
89 * Desired Clock Ctrl configuration:
90 * 32KHz source: RC or crystal, according to SYS_CTRL_OSC32K_USE_XTAL
91 * System Clock: 32 MHz
92 * Power Down Unused
93 * I/O Div: according to SYS_CTRL_IO_DIV
94 * Sys Div: according to SYS_CTRL_SYS_DIV
95 * Rest: Don't care
96 */
97
98 val = SYS_CTRL_OSCS | SYS_CTRL_CLOCK_CTRL_OSC_PD
99 | SYS_CTRL_IO_DIV | SYS_CTRL_SYS_DIV;
100 REG(SYS_CTRL_CLOCK_CTRL) = val;
101
102 while((REG(SYS_CTRL_CLOCK_STA)
103 & (SYS_CTRL_CLOCK_STA_OSC32K | SYS_CTRL_CLOCK_STA_OSC))
104 != SYS_CTRL_OSCS);
105
106#if SYS_CTRL_OSC32K_USE_XTAL
107 /* Wait for the 32-kHz crystal oscillator to stabilize */
108 while(REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SYNC_32K);
109 while(!(REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SYNC_32K));
110#endif
111}
112/*---------------------------------------------------------------------------*/
113void
115{
116 REG(SYS_CTRL_PWRDBG) = SYS_CTRL_PWRDBG_FORCE_WARM_RESET;
117}
118/*---------------------------------------------------------------------------*/
119uint32_t
121{
122 return SYS_CTRL_32MHZ >> (REG(SYS_CTRL_CLOCK_STA) &
123 SYS_CTRL_CLOCK_STA_SYS_DIV);
124}
125/*---------------------------------------------------------------------------*/
126uint32_t
128{
129 return SYS_CTRL_32MHZ >> ((REG(SYS_CTRL_CLOCK_STA) &
130 SYS_CTRL_CLOCK_STA_IO_DIV) >> 8);
131}
132/**
133 * @}
134 */
Header file with prototypes for interrupt control on the cc2538 Cortex-M3 micro.
Header file with register and macro declarations for the cc2538 GPIO module.
#define GPIO_PIN_MASK(PIN)
Converts a pin number to a pin mask.
Definition gpio.h:320
#define GPIO_D_NUM
GPIO_D: 3.
Definition gpio.h:67
#define GPIO_SOFTWARE_CONTROL(PORT_BASE, PIN_MASK)
Configure the pin to be software controlled with PIN_MASK of port with PORT_BASE.
Definition gpio.h:258
#define GPIO_PORT_TO_BASE(PORT)
Converts a port number to the port base address.
Definition gpio.h:328
#define GPIO_SET_INPUT(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to input.
Definition gpio.h:78
void ioc_set_over(uint8_t port, uint8_t pin, uint8_t over)
Set Port:Pin override function.
Definition ioc.c:54
#define IOC_OVERRIDE_ANA
Analog Enable.
Definition ioc.h:225
int sys_ctrl_get_reset_cause(void)
Gets the cause of the last reset.
Definition sys-ctrl.c:54
const char * sys_ctrl_get_reset_cause_str(void)
Gets a string describing the cause of the last reset.
Definition sys-ctrl.c:61
uint32_t sys_ctrl_get_sys_clock(void)
Returns the actual system clock in Hz.
Definition sys-ctrl.c:120
#define SYS_CTRL_PWRDBG
Power debug register.
Definition sys-ctrl.h:89
void sys_ctrl_reset()
Generates a warm reset through the SYS_CTRL_PWRDBG register.
Definition sys-ctrl.c:114
#define SYS_CTRL_CLOCK_STA
Clock status register.
Definition sys-ctrl.h:66
uint32_t sys_ctrl_get_io_clock(void)
Returns the actual io clock in Hz.
Definition sys-ctrl.c:127
void sys_ctrl_init()
Initialises the System Control Driver.
Definition sys-ctrl.c:74
#define SYS_CTRL_CLOCK_CTRL
Clock control register.
Definition sys-ctrl.h:65
Header file with declarations for the I/O Control module.
Header file with register manipulation macro definitions.
Header file for the cc2538 System Control driver.