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Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. More...
Data Structures | |
struct | CoreDebug_Type |
Structure type to access the Core Debug Register (CoreDebug). More... | |
Macros | |
#define | CoreDebug_DHCSR_DBGKEY_Pos 16U |
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25U |
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U |
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19U |
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18U |
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
#define | CoreDebug_DHCSR_S_HALT_Pos 17U |
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16U |
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U |
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3U |
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
#define | CoreDebug_DHCSR_C_STEP_Pos 2U |
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
#define | CoreDebug_DHCSR_C_HALT_Pos 1U |
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0U |
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) |
#define | CoreDebug_DCRSR_REGWnR_Pos 16U |
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
#define | CoreDebug_DCRSR_REGSEL_Pos 0U |
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) |
#define | CoreDebug_DEMCR_TRCENA_Pos 24U |
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
#define | CoreDebug_DEMCR_MON_REQ_Pos 19U |
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
#define | CoreDebug_DEMCR_MON_STEP_Pos 18U |
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
#define | CoreDebug_DEMCR_MON_PEND_Pos 17U |
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
#define | CoreDebug_DEMCR_MON_EN_Pos 16U |
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10U |
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9U |
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8U |
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7U |
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6U |
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5U |
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4U |
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0U |
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) |
#define | CoreDebug_DHCSR_DBGKEY_Pos 16U |
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25U |
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U |
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19U |
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18U |
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
#define | CoreDebug_DHCSR_S_HALT_Pos 17U |
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16U |
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U |
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3U |
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
#define | CoreDebug_DHCSR_C_STEP_Pos 2U |
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
#define | CoreDebug_DHCSR_C_HALT_Pos 1U |
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0U |
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) |
#define | CoreDebug_DCRSR_REGWnR_Pos 16U |
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
#define | CoreDebug_DCRSR_REGSEL_Pos 0U |
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) |
#define | CoreDebug_DEMCR_TRCENA_Pos 24U |
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
#define | CoreDebug_DEMCR_MON_REQ_Pos 19U |
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
#define | CoreDebug_DEMCR_MON_STEP_Pos 18U |
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
#define | CoreDebug_DEMCR_MON_PEND_Pos 17U |
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
#define | CoreDebug_DEMCR_MON_EN_Pos 16U |
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10U |
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9U |
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8U |
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7U |
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6U |
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5U |
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4U |
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0U |
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) |
#define | CoreDebug_DHCSR_DBGKEY_Pos 16U |
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25U |
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U |
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19U |
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18U |
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
#define | CoreDebug_DHCSR_S_HALT_Pos 17U |
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16U |
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U |
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3U |
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
#define | CoreDebug_DHCSR_C_STEP_Pos 2U |
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
#define | CoreDebug_DHCSR_C_HALT_Pos 1U |
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0U |
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) |
#define | CoreDebug_DCRSR_REGWnR_Pos 16U |
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
#define | CoreDebug_DCRSR_REGSEL_Pos 0U |
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) |
#define | CoreDebug_DEMCR_TRCENA_Pos 24U |
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
#define | CoreDebug_DEMCR_MON_REQ_Pos 19U |
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
#define | CoreDebug_DEMCR_MON_STEP_Pos 18U |
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
#define | CoreDebug_DEMCR_MON_PEND_Pos 17U |
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
#define | CoreDebug_DEMCR_MON_EN_Pos 16U |
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10U |
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9U |
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8U |
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7U |
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6U |
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5U |
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4U |
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0U |
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) |
#define | CoreDebug_DHCSR_DBGKEY_Pos 16U |
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25U |
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U |
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19U |
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18U |
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
#define | CoreDebug_DHCSR_S_HALT_Pos 17U |
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16U |
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U |
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3U |
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
#define | CoreDebug_DHCSR_C_STEP_Pos 2U |
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
#define | CoreDebug_DHCSR_C_HALT_Pos 1U |
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0U |
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) |
#define | CoreDebug_DCRSR_REGWnR_Pos 16U |
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
#define | CoreDebug_DCRSR_REGSEL_Pos 0U |
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) |
#define | CoreDebug_DEMCR_TRCENA_Pos 24U |
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
#define | CoreDebug_DEMCR_MON_REQ_Pos 19U |
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
#define | CoreDebug_DEMCR_MON_STEP_Pos 18U |
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
#define | CoreDebug_DEMCR_MON_PEND_Pos 17U |
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
#define | CoreDebug_DEMCR_MON_EN_Pos 16U |
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10U |
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9U |
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8U |
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7U |
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6U |
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5U |
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4U |
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0U |
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) |
Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
Type definitions for the Core Debug Registers.
Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
Therefore they are not covered by the Cortex-M0 header file.
Therefore they are not covered by the Cortex-M0+ header file.
Therefore they are not covered by the SC000 header file.
#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) |
CoreDebug DCRSR: REGSEL Mask
Definition at line 1267 of file core_sc300.h.
#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) |
CoreDebug DCRSR: REGSEL Mask
Definition at line 1285 of file core_cm3.h.
#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) |
CoreDebug DCRSR: REGSEL Mask
Definition at line 1454 of file core_cm4.h.
#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) |
CoreDebug DCRSR: REGSEL Mask
Definition at line 1662 of file core_cm7.h.
#define CoreDebug_DCRSR_REGSEL_Pos 0U |
CoreDebug DCRSR: REGSEL Position
Definition at line 1266 of file core_sc300.h.
#define CoreDebug_DCRSR_REGSEL_Pos 0U |
CoreDebug DCRSR: REGSEL Position
Definition at line 1284 of file core_cm3.h.
#define CoreDebug_DCRSR_REGSEL_Pos 0U |
CoreDebug DCRSR: REGSEL Position
Definition at line 1453 of file core_cm4.h.
#define CoreDebug_DCRSR_REGSEL_Pos 0U |
CoreDebug DCRSR: REGSEL Position
Definition at line 1661 of file core_cm7.h.
#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
CoreDebug DCRSR: REGWnR Mask
Definition at line 1264 of file core_sc300.h.
#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
CoreDebug DCRSR: REGWnR Mask
Definition at line 1282 of file core_cm3.h.
#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
CoreDebug DCRSR: REGWnR Mask
Definition at line 1451 of file core_cm4.h.
#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) |
CoreDebug DCRSR: REGWnR Mask
Definition at line 1659 of file core_cm7.h.
#define CoreDebug_DCRSR_REGWnR_Pos 16U |
CoreDebug DCRSR: REGWnR Position
Definition at line 1263 of file core_sc300.h.
#define CoreDebug_DCRSR_REGWnR_Pos 16U |
CoreDebug DCRSR: REGWnR Position
Definition at line 1281 of file core_cm3.h.
#define CoreDebug_DCRSR_REGWnR_Pos 16U |
CoreDebug DCRSR: REGWnR Position
Definition at line 1450 of file core_cm4.h.
#define CoreDebug_DCRSR_REGWnR_Pos 16U |
CoreDebug DCRSR: REGWnR Position
Definition at line 1658 of file core_cm7.h.
#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
CoreDebug DEMCR: MON_EN Mask
Definition at line 1283 of file core_sc300.h.
#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
CoreDebug DEMCR: MON_EN Mask
Definition at line 1301 of file core_cm3.h.
#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
CoreDebug DEMCR: MON_EN Mask
Definition at line 1470 of file core_cm4.h.
#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) |
CoreDebug DEMCR: MON_EN Mask
Definition at line 1678 of file core_cm7.h.
#define CoreDebug_DEMCR_MON_EN_Pos 16U |
CoreDebug DEMCR: MON_EN Position
Definition at line 1282 of file core_sc300.h.
#define CoreDebug_DEMCR_MON_EN_Pos 16U |
CoreDebug DEMCR: MON_EN Position
Definition at line 1300 of file core_cm3.h.
#define CoreDebug_DEMCR_MON_EN_Pos 16U |
CoreDebug DEMCR: MON_EN Position
Definition at line 1469 of file core_cm4.h.
#define CoreDebug_DEMCR_MON_EN_Pos 16U |
CoreDebug DEMCR: MON_EN Position
Definition at line 1677 of file core_cm7.h.
#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
CoreDebug DEMCR: MON_PEND Mask
Definition at line 1280 of file core_sc300.h.
#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
CoreDebug DEMCR: MON_PEND Mask
Definition at line 1298 of file core_cm3.h.
#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
CoreDebug DEMCR: MON_PEND Mask
Definition at line 1467 of file core_cm4.h.
#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) |
CoreDebug DEMCR: MON_PEND Mask
Definition at line 1675 of file core_cm7.h.
#define CoreDebug_DEMCR_MON_PEND_Pos 17U |
CoreDebug DEMCR: MON_PEND Position
Definition at line 1279 of file core_sc300.h.
#define CoreDebug_DEMCR_MON_PEND_Pos 17U |
CoreDebug DEMCR: MON_PEND Position
Definition at line 1297 of file core_cm3.h.
#define CoreDebug_DEMCR_MON_PEND_Pos 17U |
CoreDebug DEMCR: MON_PEND Position
Definition at line 1466 of file core_cm4.h.
#define CoreDebug_DEMCR_MON_PEND_Pos 17U |
CoreDebug DEMCR: MON_PEND Position
Definition at line 1674 of file core_cm7.h.
#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
CoreDebug DEMCR: MON_REQ Mask
Definition at line 1274 of file core_sc300.h.
#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
CoreDebug DEMCR: MON_REQ Mask
Definition at line 1292 of file core_cm3.h.
#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
CoreDebug DEMCR: MON_REQ Mask
Definition at line 1461 of file core_cm4.h.
#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) |
CoreDebug DEMCR: MON_REQ Mask
Definition at line 1669 of file core_cm7.h.
#define CoreDebug_DEMCR_MON_REQ_Pos 19U |
CoreDebug DEMCR: MON_REQ Position
Definition at line 1273 of file core_sc300.h.
#define CoreDebug_DEMCR_MON_REQ_Pos 19U |
CoreDebug DEMCR: MON_REQ Position
Definition at line 1291 of file core_cm3.h.
#define CoreDebug_DEMCR_MON_REQ_Pos 19U |
CoreDebug DEMCR: MON_REQ Position
Definition at line 1460 of file core_cm4.h.
#define CoreDebug_DEMCR_MON_REQ_Pos 19U |
CoreDebug DEMCR: MON_REQ Position
Definition at line 1668 of file core_cm7.h.
#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
CoreDebug DEMCR: MON_STEP Mask
Definition at line 1277 of file core_sc300.h.
#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
CoreDebug DEMCR: MON_STEP Mask
Definition at line 1295 of file core_cm3.h.
#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
CoreDebug DEMCR: MON_STEP Mask
Definition at line 1464 of file core_cm4.h.
#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) |
CoreDebug DEMCR: MON_STEP Mask
Definition at line 1672 of file core_cm7.h.
#define CoreDebug_DEMCR_MON_STEP_Pos 18U |
CoreDebug DEMCR: MON_STEP Position
Definition at line 1276 of file core_sc300.h.
#define CoreDebug_DEMCR_MON_STEP_Pos 18U |
CoreDebug DEMCR: MON_STEP Position
Definition at line 1294 of file core_cm3.h.
#define CoreDebug_DEMCR_MON_STEP_Pos 18U |
CoreDebug DEMCR: MON_STEP Position
Definition at line 1463 of file core_cm4.h.
#define CoreDebug_DEMCR_MON_STEP_Pos 18U |
CoreDebug DEMCR: MON_STEP Position
Definition at line 1671 of file core_cm7.h.
#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
CoreDebug DEMCR: TRCENA Mask
Definition at line 1271 of file core_sc300.h.
#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
CoreDebug DEMCR: TRCENA Mask
Definition at line 1289 of file core_cm3.h.
#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
CoreDebug DEMCR: TRCENA Mask
Definition at line 1458 of file core_cm4.h.
#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) |
CoreDebug DEMCR: TRCENA Mask
Definition at line 1666 of file core_cm7.h.
#define CoreDebug_DEMCR_TRCENA_Pos 24U |
CoreDebug DEMCR: TRCENA Position
Definition at line 1270 of file core_sc300.h.
#define CoreDebug_DEMCR_TRCENA_Pos 24U |
CoreDebug DEMCR: TRCENA Position
Definition at line 1288 of file core_cm3.h.
#define CoreDebug_DEMCR_TRCENA_Pos 24U |
CoreDebug DEMCR: TRCENA Position
Definition at line 1457 of file core_cm4.h.
#define CoreDebug_DEMCR_TRCENA_Pos 24U |
CoreDebug DEMCR: TRCENA Position
Definition at line 1665 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
CoreDebug DEMCR: VC_BUSERR Mask
Definition at line 1292 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
CoreDebug DEMCR: VC_BUSERR Mask
Definition at line 1310 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
CoreDebug DEMCR: VC_BUSERR Mask
Definition at line 1479 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) |
CoreDebug DEMCR: VC_BUSERR Mask
Definition at line 1687 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U |
CoreDebug DEMCR: VC_BUSERR Position
Definition at line 1291 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U |
CoreDebug DEMCR: VC_BUSERR Position
Definition at line 1309 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U |
CoreDebug DEMCR: VC_BUSERR Position
Definition at line 1478 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U |
CoreDebug DEMCR: VC_BUSERR Position
Definition at line 1686 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
CoreDebug DEMCR: VC_CHKERR Mask
Definition at line 1298 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
CoreDebug DEMCR: VC_CHKERR Mask
Definition at line 1316 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
CoreDebug DEMCR: VC_CHKERR Mask
Definition at line 1485 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) |
CoreDebug DEMCR: VC_CHKERR Mask
Definition at line 1693 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U |
CoreDebug DEMCR: VC_CHKERR Position
Definition at line 1297 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U |
CoreDebug DEMCR: VC_CHKERR Position
Definition at line 1315 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U |
CoreDebug DEMCR: VC_CHKERR Position
Definition at line 1484 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U |
CoreDebug DEMCR: VC_CHKERR Position
Definition at line 1692 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) |
CoreDebug DEMCR: VC_CORERESET Mask
Definition at line 1307 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) |
CoreDebug DEMCR: VC_CORERESET Mask
Definition at line 1325 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) |
CoreDebug DEMCR: VC_CORERESET Mask
Definition at line 1494 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) |
CoreDebug DEMCR: VC_CORERESET Mask
Definition at line 1702 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U |
CoreDebug DEMCR: VC_CORERESET Position
Definition at line 1306 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U |
CoreDebug DEMCR: VC_CORERESET Position
Definition at line 1324 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U |
CoreDebug DEMCR: VC_CORERESET Position
Definition at line 1493 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U |
CoreDebug DEMCR: VC_CORERESET Position
Definition at line 1701 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
CoreDebug DEMCR: VC_HARDERR Mask
Definition at line 1286 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
CoreDebug DEMCR: VC_HARDERR Mask
Definition at line 1304 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
CoreDebug DEMCR: VC_HARDERR Mask
Definition at line 1473 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) |
CoreDebug DEMCR: VC_HARDERR Mask
Definition at line 1681 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U |
CoreDebug DEMCR: VC_HARDERR Position
Definition at line 1285 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U |
CoreDebug DEMCR: VC_HARDERR Position
Definition at line 1303 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U |
CoreDebug DEMCR: VC_HARDERR Position
Definition at line 1472 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U |
CoreDebug DEMCR: VC_HARDERR Position
Definition at line 1680 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
CoreDebug DEMCR: VC_INTERR Mask
Definition at line 1289 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
CoreDebug DEMCR: VC_INTERR Mask
Definition at line 1307 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
CoreDebug DEMCR: VC_INTERR Mask
Definition at line 1476 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) |
CoreDebug DEMCR: VC_INTERR Mask
Definition at line 1684 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_INTERR_Pos 9U |
CoreDebug DEMCR: VC_INTERR Position
Definition at line 1288 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_INTERR_Pos 9U |
CoreDebug DEMCR: VC_INTERR Position
Definition at line 1306 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_INTERR_Pos 9U |
CoreDebug DEMCR: VC_INTERR Position
Definition at line 1475 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_INTERR_Pos 9U |
CoreDebug DEMCR: VC_INTERR Position
Definition at line 1683 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
CoreDebug DEMCR: VC_MMERR Mask
Definition at line 1304 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
CoreDebug DEMCR: VC_MMERR Mask
Definition at line 1322 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
CoreDebug DEMCR: VC_MMERR Mask
Definition at line 1491 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) |
CoreDebug DEMCR: VC_MMERR Mask
Definition at line 1699 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_MMERR_Pos 4U |
CoreDebug DEMCR: VC_MMERR Position
Definition at line 1303 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_MMERR_Pos 4U |
CoreDebug DEMCR: VC_MMERR Position
Definition at line 1321 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_MMERR_Pos 4U |
CoreDebug DEMCR: VC_MMERR Position
Definition at line 1490 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_MMERR_Pos 4U |
CoreDebug DEMCR: VC_MMERR Position
Definition at line 1698 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
CoreDebug DEMCR: VC_NOCPERR Mask
Definition at line 1301 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
CoreDebug DEMCR: VC_NOCPERR Mask
Definition at line 1319 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
CoreDebug DEMCR: VC_NOCPERR Mask
Definition at line 1488 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
CoreDebug DEMCR: VC_NOCPERR Mask
Definition at line 1696 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U |
CoreDebug DEMCR: VC_NOCPERR Position
Definition at line 1300 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U |
CoreDebug DEMCR: VC_NOCPERR Position
Definition at line 1318 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U |
CoreDebug DEMCR: VC_NOCPERR Position
Definition at line 1487 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U |
CoreDebug DEMCR: VC_NOCPERR Position
Definition at line 1695 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
CoreDebug DEMCR: VC_STATERR Mask
Definition at line 1295 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
CoreDebug DEMCR: VC_STATERR Mask
Definition at line 1313 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
CoreDebug DEMCR: VC_STATERR Mask
Definition at line 1482 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) |
CoreDebug DEMCR: VC_STATERR Mask
Definition at line 1690 of file core_cm7.h.
#define CoreDebug_DEMCR_VC_STATERR_Pos 7U |
CoreDebug DEMCR: VC_STATERR Position
Definition at line 1294 of file core_sc300.h.
#define CoreDebug_DEMCR_VC_STATERR_Pos 7U |
CoreDebug DEMCR: VC_STATERR Position
Definition at line 1312 of file core_cm3.h.
#define CoreDebug_DEMCR_VC_STATERR_Pos 7U |
CoreDebug DEMCR: VC_STATERR Position
Definition at line 1481 of file core_cm4.h.
#define CoreDebug_DEMCR_VC_STATERR_Pos 7U |
CoreDebug DEMCR: VC_STATERR Position
Definition at line 1689 of file core_cm7.h.
#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) |
CoreDebug DHCSR: C_DEBUGEN Mask
Definition at line 1260 of file core_sc300.h.
#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) |
CoreDebug DHCSR: C_DEBUGEN Mask
Definition at line 1278 of file core_cm3.h.
#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) |
CoreDebug DHCSR: C_DEBUGEN Mask
Definition at line 1447 of file core_cm4.h.
#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) |
CoreDebug DHCSR: C_DEBUGEN Mask
Definition at line 1655 of file core_cm7.h.
#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U |
CoreDebug DHCSR: C_DEBUGEN Position
Definition at line 1259 of file core_sc300.h.
#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U |
CoreDebug DHCSR: C_DEBUGEN Position
Definition at line 1277 of file core_cm3.h.
#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U |
CoreDebug DHCSR: C_DEBUGEN Position
Definition at line 1446 of file core_cm4.h.
#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U |
CoreDebug DHCSR: C_DEBUGEN Position
Definition at line 1654 of file core_cm7.h.
#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
CoreDebug DHCSR: C_HALT Mask
Definition at line 1257 of file core_sc300.h.
#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
CoreDebug DHCSR: C_HALT Mask
Definition at line 1275 of file core_cm3.h.
#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
CoreDebug DHCSR: C_HALT Mask
Definition at line 1444 of file core_cm4.h.
#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) |
CoreDebug DHCSR: C_HALT Mask
Definition at line 1652 of file core_cm7.h.
#define CoreDebug_DHCSR_C_HALT_Pos 1U |
CoreDebug DHCSR: C_HALT Position
Definition at line 1256 of file core_sc300.h.
#define CoreDebug_DHCSR_C_HALT_Pos 1U |
CoreDebug DHCSR: C_HALT Position
Definition at line 1274 of file core_cm3.h.
#define CoreDebug_DHCSR_C_HALT_Pos 1U |
CoreDebug DHCSR: C_HALT Position
Definition at line 1443 of file core_cm4.h.
#define CoreDebug_DHCSR_C_HALT_Pos 1U |
CoreDebug DHCSR: C_HALT Position
Definition at line 1651 of file core_cm7.h.
#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
CoreDebug DHCSR: C_MASKINTS Mask
Definition at line 1251 of file core_sc300.h.
#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
CoreDebug DHCSR: C_MASKINTS Mask
Definition at line 1269 of file core_cm3.h.
#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
CoreDebug DHCSR: C_MASKINTS Mask
Definition at line 1438 of file core_cm4.h.
#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) |
CoreDebug DHCSR: C_MASKINTS Mask
Definition at line 1646 of file core_cm7.h.
#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U |
CoreDebug DHCSR: C_MASKINTS Position
Definition at line 1250 of file core_sc300.h.
#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U |
CoreDebug DHCSR: C_MASKINTS Position
Definition at line 1268 of file core_cm3.h.
#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U |
CoreDebug DHCSR: C_MASKINTS Position
Definition at line 1437 of file core_cm4.h.
#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U |
CoreDebug DHCSR: C_MASKINTS Position
Definition at line 1645 of file core_cm7.h.
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
CoreDebug DHCSR: C_SNAPSTALL Mask
Definition at line 1248 of file core_sc300.h.
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
CoreDebug DHCSR: C_SNAPSTALL Mask
Definition at line 1266 of file core_cm3.h.
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
CoreDebug DHCSR: C_SNAPSTALL Mask
Definition at line 1435 of file core_cm4.h.
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
CoreDebug DHCSR: C_SNAPSTALL Mask
Definition at line 1643 of file core_cm7.h.
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U |
CoreDebug DHCSR: C_SNAPSTALL Position
Definition at line 1247 of file core_sc300.h.
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U |
CoreDebug DHCSR: C_SNAPSTALL Position
Definition at line 1265 of file core_cm3.h.
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U |
CoreDebug DHCSR: C_SNAPSTALL Position
Definition at line 1434 of file core_cm4.h.
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U |
CoreDebug DHCSR: C_SNAPSTALL Position
Definition at line 1642 of file core_cm7.h.
#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
CoreDebug DHCSR: C_STEP Mask
Definition at line 1254 of file core_sc300.h.
#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
CoreDebug DHCSR: C_STEP Mask
Definition at line 1272 of file core_cm3.h.
#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
CoreDebug DHCSR: C_STEP Mask
Definition at line 1441 of file core_cm4.h.
#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) |
CoreDebug DHCSR: C_STEP Mask
Definition at line 1649 of file core_cm7.h.
#define CoreDebug_DHCSR_C_STEP_Pos 2U |
CoreDebug DHCSR: C_STEP Position
Definition at line 1253 of file core_sc300.h.
#define CoreDebug_DHCSR_C_STEP_Pos 2U |
CoreDebug DHCSR: C_STEP Position
Definition at line 1271 of file core_cm3.h.
#define CoreDebug_DHCSR_C_STEP_Pos 2U |
CoreDebug DHCSR: C_STEP Position
Definition at line 1440 of file core_cm4.h.
#define CoreDebug_DHCSR_C_STEP_Pos 2U |
CoreDebug DHCSR: C_STEP Position
Definition at line 1648 of file core_cm7.h.
#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
CoreDebug DHCSR: DBGKEY Mask
Definition at line 1227 of file core_sc300.h.
#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
CoreDebug DHCSR: DBGKEY Mask
Definition at line 1245 of file core_cm3.h.
#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
CoreDebug DHCSR: DBGKEY Mask
Definition at line 1414 of file core_cm4.h.
#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) |
CoreDebug DHCSR: DBGKEY Mask
Definition at line 1622 of file core_cm7.h.
#define CoreDebug_DHCSR_DBGKEY_Pos 16U |
CoreDebug DHCSR: DBGKEY Position
Definition at line 1226 of file core_sc300.h.
#define CoreDebug_DHCSR_DBGKEY_Pos 16U |
CoreDebug DHCSR: DBGKEY Position
Definition at line 1244 of file core_cm3.h.
#define CoreDebug_DHCSR_DBGKEY_Pos 16U |
CoreDebug DHCSR: DBGKEY Position
Definition at line 1413 of file core_cm4.h.
#define CoreDebug_DHCSR_DBGKEY_Pos 16U |
CoreDebug DHCSR: DBGKEY Position
Definition at line 1621 of file core_cm7.h.
#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
CoreDebug DHCSR: S_HALT Mask
Definition at line 1242 of file core_sc300.h.
#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
CoreDebug DHCSR: S_HALT Mask
Definition at line 1260 of file core_cm3.h.
#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
CoreDebug DHCSR: S_HALT Mask
Definition at line 1429 of file core_cm4.h.
#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) |
CoreDebug DHCSR: S_HALT Mask
Definition at line 1637 of file core_cm7.h.
#define CoreDebug_DHCSR_S_HALT_Pos 17U |
CoreDebug DHCSR: S_HALT Position
Definition at line 1241 of file core_sc300.h.
#define CoreDebug_DHCSR_S_HALT_Pos 17U |
CoreDebug DHCSR: S_HALT Position
Definition at line 1259 of file core_cm3.h.
#define CoreDebug_DHCSR_S_HALT_Pos 17U |
CoreDebug DHCSR: S_HALT Position
Definition at line 1428 of file core_cm4.h.
#define CoreDebug_DHCSR_S_HALT_Pos 17U |
CoreDebug DHCSR: S_HALT Position
Definition at line 1636 of file core_cm7.h.
#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
CoreDebug DHCSR: S_LOCKUP Mask
Definition at line 1236 of file core_sc300.h.
#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
CoreDebug DHCSR: S_LOCKUP Mask
Definition at line 1254 of file core_cm3.h.
#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
CoreDebug DHCSR: S_LOCKUP Mask
Definition at line 1423 of file core_cm4.h.
#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) |
CoreDebug DHCSR: S_LOCKUP Mask
Definition at line 1631 of file core_cm7.h.
#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U |
CoreDebug DHCSR: S_LOCKUP Position
Definition at line 1235 of file core_sc300.h.
#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U |
CoreDebug DHCSR: S_LOCKUP Position
Definition at line 1253 of file core_cm3.h.
#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U |
CoreDebug DHCSR: S_LOCKUP Position
Definition at line 1422 of file core_cm4.h.
#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U |
CoreDebug DHCSR: S_LOCKUP Position
Definition at line 1630 of file core_cm7.h.
#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
CoreDebug DHCSR: S_REGRDY Mask
Definition at line 1245 of file core_sc300.h.
#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
CoreDebug DHCSR: S_REGRDY Mask
Definition at line 1263 of file core_cm3.h.
#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
CoreDebug DHCSR: S_REGRDY Mask
Definition at line 1432 of file core_cm4.h.
#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) |
CoreDebug DHCSR: S_REGRDY Mask
Definition at line 1640 of file core_cm7.h.
#define CoreDebug_DHCSR_S_REGRDY_Pos 16U |
CoreDebug DHCSR: S_REGRDY Position
Definition at line 1244 of file core_sc300.h.
#define CoreDebug_DHCSR_S_REGRDY_Pos 16U |
CoreDebug DHCSR: S_REGRDY Position
Definition at line 1262 of file core_cm3.h.
#define CoreDebug_DHCSR_S_REGRDY_Pos 16U |
CoreDebug DHCSR: S_REGRDY Position
Definition at line 1431 of file core_cm4.h.
#define CoreDebug_DHCSR_S_REGRDY_Pos 16U |
CoreDebug DHCSR: S_REGRDY Position
Definition at line 1639 of file core_cm7.h.
#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
CoreDebug DHCSR: S_RESET_ST Mask
Definition at line 1230 of file core_sc300.h.
#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
CoreDebug DHCSR: S_RESET_ST Mask
Definition at line 1248 of file core_cm3.h.
#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
CoreDebug DHCSR: S_RESET_ST Mask
Definition at line 1417 of file core_cm4.h.
#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) |
CoreDebug DHCSR: S_RESET_ST Mask
Definition at line 1625 of file core_cm7.h.
#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U |
CoreDebug DHCSR: S_RESET_ST Position
Definition at line 1229 of file core_sc300.h.
#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U |
CoreDebug DHCSR: S_RESET_ST Position
Definition at line 1247 of file core_cm3.h.
#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U |
CoreDebug DHCSR: S_RESET_ST Position
Definition at line 1416 of file core_cm4.h.
#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U |
CoreDebug DHCSR: S_RESET_ST Position
Definition at line 1624 of file core_cm7.h.
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
CoreDebug DHCSR: S_RETIRE_ST Mask
Definition at line 1233 of file core_sc300.h.
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
CoreDebug DHCSR: S_RETIRE_ST Mask
Definition at line 1251 of file core_cm3.h.
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
CoreDebug DHCSR: S_RETIRE_ST Mask
Definition at line 1420 of file core_cm4.h.
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
CoreDebug DHCSR: S_RETIRE_ST Mask
Definition at line 1628 of file core_cm7.h.
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U |
CoreDebug DHCSR: S_RETIRE_ST Position
Definition at line 1232 of file core_sc300.h.
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U |
CoreDebug DHCSR: S_RETIRE_ST Position
Definition at line 1250 of file core_cm3.h.
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U |
CoreDebug DHCSR: S_RETIRE_ST Position
Definition at line 1419 of file core_cm4.h.
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U |
CoreDebug DHCSR: S_RETIRE_ST Position
Definition at line 1627 of file core_cm7.h.
#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
CoreDebug DHCSR: S_SLEEP Mask
Definition at line 1239 of file core_sc300.h.
#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
CoreDebug DHCSR: S_SLEEP Mask
Definition at line 1257 of file core_cm3.h.
#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
CoreDebug DHCSR: S_SLEEP Mask
Definition at line 1426 of file core_cm4.h.
#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) |
CoreDebug DHCSR: S_SLEEP Mask
Definition at line 1634 of file core_cm7.h.
#define CoreDebug_DHCSR_S_SLEEP_Pos 18U |
CoreDebug DHCSR: S_SLEEP Position
Definition at line 1238 of file core_sc300.h.
#define CoreDebug_DHCSR_S_SLEEP_Pos 18U |
CoreDebug DHCSR: S_SLEEP Position
Definition at line 1256 of file core_cm3.h.
#define CoreDebug_DHCSR_S_SLEEP_Pos 18U |
CoreDebug DHCSR: S_SLEEP Position
Definition at line 1425 of file core_cm4.h.
#define CoreDebug_DHCSR_S_SLEEP_Pos 18U |
CoreDebug DHCSR: S_SLEEP Position
Definition at line 1633 of file core_cm7.h.