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#define | UART_INSTANCE_COUNT 2 |
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#define | UART_0_BASE 0x4000C000 |
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#define | UART_1_BASE 0x4000D000 |
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#define | UART_DR 0x00000000 |
| UART data.
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#define | UART_RSR 0x00000004 |
| UART RX status and err clear.
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#define | UART_ECR 0x00000004 |
| UART RX status and err clear.
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#define | UART_FR 0x00000018 |
| UART flag.
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#define | UART_ILPR 0x00000020 |
| UART IrDA low-power.
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#define | UART_IBRD 0x00000024 |
| UART BAUD divisor: integer.
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#define | UART_FBRD 0x00000028 |
| UART BAUD divisor: fractional.
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#define | UART_LCRH 0x0000002C |
| UART line control.
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#define | UART_CTL 0x00000030 |
| UART control.
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#define | UART_IFLS 0x00000034 |
| UART interrupt FIFO level.
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#define | UART_IM 0x00000038 |
| UART interrupt mask.
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#define | UART_RIS 0x0000003C |
| UART raw interrupt status.
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#define | UART_MIS 0x00000040 |
| UART masked interrupt status.
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#define | UART_ICR 0x00000044 |
| UART interrupt clear.
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#define | UART_DMACTL 0x00000048 |
| UART DMA control.
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#define | UART_LCTL 0x00000090 |
| UART LIN control.
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#define | UART_LSS 0x00000094 |
| UART LIN snap shot.
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#define | UART_LTIM 0x00000098 |
| UART LIN timer.
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#define | UART_NINEBITADDR 0x000000A4 |
| UART 9-bit self address.
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#define | UART_NINEBITAMASK 0x000000A8 |
| UART 9-bit self address mask.
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#define | UART_PP 0x00000FC0 |
| UART peripheral properties.
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#define | UART_CC 0x00000FC8 |
| UART clock configuration.
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#define | UART_DR_OE 0x00000800 |
| UART overrun error.
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#define | UART_DR_BE 0x00000400 |
| UART break error.
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#define | UART_DR_PE 0x00000200 |
| UART parity error.
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#define | UART_DR_FE 0x00000100 |
| UART framing error.
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#define | UART_DR_DATA 0x000000FF |
| Data transmitted or received.
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#define | UART_RSR_OE 0x00000008 |
| UART overrun error.
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#define | UART_RSR_BE 0x00000004 |
| UART break error.
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#define | UART_RSR_PE 0x00000002 |
| UART parity error.
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#define | UART_RSR_FE 0x00000001 |
| UART framing error.
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#define | UART_ECR_DATA 0x000000FF |
| Error clear.
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#define | UART_FR_TXFE 0x00000080 |
| UART transmit FIFO empty.
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#define | UART_FR_RXFF 0x00000040 |
| UART receive FIFO full.
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#define | UART_FR_TXFF 0x00000020 |
| UART transmit FIFO full.
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#define | UART_FR_RXFE 0x00000010 |
| UART receive FIFO empty.
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#define | UART_FR_BUSY 0x00000008 |
| UART busy.
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#define | UART_FR_CTS 0x00000001 |
| Clear to send.
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#define | UART_ILPR_ILPDVSR 0x000000FF |
| IrDA low-power divisor.
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#define | UART_IBRD_DIVINT 0x0000FFFF |
| Integer baud-rate divisor.
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#define | UART_FBRD_DIVFRAC 0x0000003F |
| Fractional baud-rate divisor.
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#define | UART_LCRH_SPS 0x00000080 |
| UART stick parity select.
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#define | UART_LCRH_WLEN 0x00000060 |
| UART word length.
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#define | UART_LCRH_FEN 0x00000010 |
| UART enable FIFOs.
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#define | UART_LCRH_STP2 0x00000008 |
| UART two stop bits select.
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#define | UART_LCRH_EPS 0x00000004 |
| UART even parity select.
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#define | UART_LCRH_PEN 0x00000002 |
| UART parity enable.
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#define | UART_LCRH_BRK 0x00000001 |
| UART send break.
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#define | UART_LCRH_WLEN_8 0x00000060 |
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#define | UART_LCRH_WLEN_7 0x00000040 |
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#define | UART_LCRH_WLEN_6 0x00000020 |
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#define | UART_LCRH_WLEN_5 0x00000000 |
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#define | UART_CTL_CTSEN 0x00008000 |
| UART CTS flow-control enable (UART1 only)
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#define | UART_CTL_RTSEN 0x00004000 |
| UART RTS flow-control enable (UART1 only)
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#define | UART_CTL_RXE 0x00000200 |
| UART receive enable.
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#define | UART_CTL_TXE 0x00000100 |
| UART transmit enable.
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#define | UART_CTL_LBE 0x00000080 |
| UART loop back enable.
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#define | UART_CTL_LIN 0x00000040 |
| LIN mode enable.
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#define | UART_CTL_HSE 0x00000020 |
| High-speed enable.
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#define | UART_CTL_EOT 0x00000010 |
| End of transmission.
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#define | UART_CTL_SMART 0x00000008 |
| ISO 7816 Smart Card support.
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#define | UART_CTL_SIRLP 0x00000004 |
| UART SIR low-power mode.
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#define | UART_CTL_SIREN 0x00000002 |
| UART SIR enable.
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#define | UART_CTL_UARTEN 0x00000001 |
| UART enable.
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#define | UART_IFLS_RXIFLSEL 0x00000038 |
| UART RX FIFO level select.
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#define | UART_IFLS_TXIFLSEL 0x00000007 |
| UART TX FIFO level select.
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#define | UART_IFLS_RXIFLSEL_7_8 0x00000020 |
| UART RX FIFO >= 7/8 full.
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#define | UART_IFLS_RXIFLSEL_3_4 0x00000018 |
| UART RX FIFO >= 3/4 full.
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#define | UART_IFLS_RXIFLSEL_1_2 0x00000010 |
| UART RX FIFO >= 1/2 full.
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#define | UART_IFLS_RXIFLSEL_1_4 0x00000008 |
| UART RX FIFO >= 1/4 full.
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#define | UART_IFLS_RXIFLSEL_1_8 0x00000000 |
| UART RX FIFO >= 1/8 full.
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#define | UART_IFLS_TXIFLSEL_1_8 0x00000004 |
| UART TX FIFO >= 1/8 empty.
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#define | UART_IFLS_TXIFLSEL_1_4 0x00000003 |
| UART TX FIFO >= 1/4 empty.
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#define | UART_IFLS_TXIFLSEL_1_2 0x00000002 |
| UART TX FIFO >= 1/2 empty.
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#define | UART_IFLS_TXIFLSEL_3_4 0x00000001 |
| UART TX FIFO >= 3/4 empty.
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#define | UART_IFLS_TXIFLSEL_7_8 0x00000000 |
| UART TX FIFO >= 7/8 empty.
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#define | UART_IM_LME5IM 0x00008000 |
| LIN mode edge 5 intr mask.
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#define | UART_IM_LME1IM 0x00004000 |
| LIN mode edge 1 intr mask.
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#define | UART_IM_LMSBIM 0x00002000 |
| LIN mode sync break mask.
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#define | UART_IM_NINEBITIM 0x00001000 |
| 9-bit mode interrupt mask
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#define | UART_IM_OEIM 0x00000400 |
| UART overrun error mask.
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#define | UART_IM_BEIM 0x00000200 |
| UART break error mask.
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#define | UART_IM_PEIM 0x00000100 |
| UART parity error mask.
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#define | UART_IM_FEIM 0x00000080 |
| UART framing error.
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#define | UART_IM_RTIM 0x00000040 |
| UART receive time-out mask.
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#define | UART_IM_TXIM 0x00000020 |
| UART transmit intr mask.
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#define | UART_IM_RXIM 0x00000010 |
| UART receive interrupt mask.
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#define | UART_IM_CTSIM 0x00000002 |
| UART CTS modem mask.
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#define | UART_RIS_LME5RIS 0x00008000 |
| LIN mode edge 5 raw.
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#define | UART_RIS_LME1RIS 0x00004000 |
| LIN mode edge 1 raw.
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#define | UART_RIS_LMSBRIS 0x00002000 |
| LIN mode sync break raw.
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#define | UART_RIS_NINEBITRIS 0x00001000 |
| 9-bit mode raw intr
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#define | UART_RIS_OERIS 0x00000400 |
| UART overrun error raw.
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#define | UART_RIS_BERIS 0x00000200 |
| UART break error raw.
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#define | UART_RIS_PERIS 0x00000100 |
| UART parity error raw.
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#define | UART_RIS_FERIS 0x00000080 |
| UART framing error raw.
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#define | UART_RIS_RTRIS 0x00000040 |
| UART RX time-out raw.
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#define | UART_RIS_TXRIS 0x00000020 |
| UART transmit raw.
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#define | UART_RIS_RXRIS 0x00000010 |
| UART receive raw.
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#define | UART_RIS_CTSRIS 0x00000002 |
| UART CTS modem.
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#define | UART_MIS_LME5MIS 0x00008000 |
| LIN mode edge 5 masked stat.
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#define | UART_MIS_LME1MIS 0x00004000 |
| LIN mode edge 1 masked stat.
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#define | UART_MIS_LMSBMIS 0x00002000 |
| LIN mode sync br masked stat.
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#define | UART_MIS_NINEBITMIS 0x00001000 |
| 9-bit mode masked stat
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#define | UART_MIS_OEMIS 0x00000400 |
| UART overrun err masked stat.
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#define | UART_MIS_BEMIS 0x00000200 |
| UART break err masked stat.
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#define | UART_MIS_PEMIS 0x00000100 |
| UART parity err masked stat.
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#define | UART_MIS_FEMIS 0x00000080 |
| UART framing err masked stat.
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#define | UART_MIS_RTMIS 0x00000040 |
| UART RX time-out masked stat.
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#define | UART_MIS_TXMIS 0x00000020 |
| UART TX masked intr stat.
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#define | UART_MIS_RXMIS 0x00000010 |
| UART RX masked intr stat.
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#define | UART_MIS_CTSMIS 0x00000002 |
| UART CTS modem masked stat.
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#define | UART_ICR_LME5IC 0x00008000 |
| LIN mode edge 5 intr clear.
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#define | UART_ICR_LME1IC 0x00004000 |
| LIN mode edge 1 intr clear.
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#define | UART_ICR_LMSBIC 0x00002000 |
| LIN mode sync br intr clear.
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#define | UART_ICR_NINEBITIC 0x00001000 |
| 9-bit mode intr clear
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#define | UART_ICR_OEIC 0x00000400 |
| Overrun error intr clear.
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#define | UART_ICR_BEIC 0x00000200 |
| Break error intr clear.
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#define | UART_ICR_PEIC 0x00000100 |
| Parity error intr clear.
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#define | UART_ICR_FEIC 0x00000080 |
| Framing error intr clear.
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#define | UART_ICR_RTIC 0x00000040 |
| Receive time-out intr clear.
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#define | UART_ICR_TXIC 0x00000020 |
| Transmit intr clear.
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#define | UART_ICR_RXIC 0x00000010 |
| Receive intr clear.
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#define | UART_ICR_CTSIC 0x00000002 |
| UART CTS modem intr clear.
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#define | UART_DMACTL_DMAERR 0x00000004 |
| DMA on error.
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#define | UART_DMACTL_TXDMAE 0x00000002 |
| Transmit DMA enable.
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#define | UART_DMACTL_RXDMAE 0x00000001 |
| Receive DMA enable.
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#define | UART_LCTL_BLEN 0x00000030 |
| Sync break length.
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#define | UART_LCTL_MASTER 0x00000001 |
| LIN master enable.
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#define | UART_LSS_TSS 0x0000FFFF |
| Timer snap shot.
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#define | UART_LTIM_TIMER 0x0000FFFF |
| Timer value.
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#define | UART_NINEBITADDR_NINEBITEN 0x00008000 |
| Enable 9-bit mode.
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#define | UART_NINEBITADDR_ADDR 0x000000FF |
| Self address for 9-bit mode.
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#define | UART_NINEBITAMASK_RANGE 0x0000FF00 |
| Self addr range, 9-bit mode.
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#define | UART_NINEBITAMASK_MASK 0x000000FF |
| Self addr mask, 9-bit mode.
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#define | UART_PP_NB 0x00000002 |
| 9-bit support
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#define | UART_PP_SC 0x00000001 |
| Smart card support.
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#define | UART_CC_CS 0x00000007 |
| UART BAUD & sys clock source.
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Header file for the cc2538 UART driver.
Definition in file uart.h.