45#ifndef __CC1352P1_LAUNCHXL_BOARD_H__
46#define __CC1352P1_LAUNCHXL_BOARD_H__
52#include "contiki-conf.h"
55#include <ti/drivers/PIN.h>
56#include <ti/devices/DeviceFamily.h>
57#include DeviceFamily_constructPath(driverlib/ioc.h)
60extern const PIN_Config BoardGpioInitTable[];
63#define CC1352P1_LAUNCHXL
73#define CC1352P1_LAUNCHXL_DIO23_ANALOG IOID_23
74#define CC1352P1_LAUNCHXL_DIO24_ANALOG IOID_24
75#define CC1352P1_LAUNCHXL_DIO25_ANALOG IOID_25
76#define CC1352P1_LAUNCHXL_DIO26_ANALOG IOID_26
77#define CC1352P1_LAUNCHXL_DIO27_ANALOG IOID_27
80#define CC1352P1_LAUNCHXL_DIO28_RF_24GHZ IOID_28
81#define CC1352P1_LAUNCHXL_DIO29_RF_HIGH_PA IOID_29
82#define CC1352P1_LAUNCHXL_DIO30_RF_SUB1GHZ IOID_30
85#define CC1352P1_LAUNCHXL_DIO12 IOID_12
86#define CC1352P1_LAUNCHXL_DIO15 IOID_15
87#define CC1352P1_LAUNCHXL_DIO16_TDO IOID_16
88#define CC1352P1_LAUNCHXL_DIO17_TDI IOID_17
89#define CC1352P1_LAUNCHXL_DIO21 IOID_21
90#define CC1352P1_LAUNCHXL_DIO22 IOID_22
93#define CC1352P1_LAUNCHXL_PIN_BTN1 IOID_15
94#define CC1352P1_LAUNCHXL_PIN_BTN2 IOID_14
97#define CC1352P1_LAUNCHXL_GPIO_LED_ON 1
98#define CC1352P1_LAUNCHXL_GPIO_LED_OFF 0
101#define CC1352P1_LAUNCHXL_I2C0_SCL0 IOID_21
102#define CC1352P1_LAUNCHXL_I2C0_SDA0 IOID_5
105#define CC1352P1_LAUNCHXL_I2S_ADO IOID_25
106#define CC1352P1_LAUNCHXL_I2S_ADI IOID_26
107#define CC1352P1_LAUNCHXL_I2S_BCLK IOID_27
108#define CC1352P1_LAUNCHXL_I2S_MCLK PIN_UNASSIGNED
109#define CC1352P1_LAUNCHXL_I2S_WCLK IOID_28
112#define CC1352P1_LAUNCHXL_PIN_LED_ON 1
113#define CC1352P1_LAUNCHXL_PIN_LED_OFF 0
114#define CC1352P1_LAUNCHXL_PIN_RLED IOID_6
115#define CC1352P1_LAUNCHXL_PIN_GLED IOID_7
118#define CC1352P1_LAUNCHXL_PWMPIN0 CC1352P1_LAUNCHXL_PIN_RLED
119#define CC1352P1_LAUNCHXL_PWMPIN1 CC1352P1_LAUNCHXL_PIN_GLED
120#define CC1352P1_LAUNCHXL_PWMPIN2 PIN_UNASSIGNED
121#define CC1352P1_LAUNCHXL_PWMPIN3 PIN_UNASSIGNED
122#define CC1352P1_LAUNCHXL_PWMPIN4 PIN_UNASSIGNED
123#define CC1352P1_LAUNCHXL_PWMPIN5 PIN_UNASSIGNED
124#define CC1352P1_LAUNCHXL_PWMPIN6 PIN_UNASSIGNED
125#define CC1352P1_LAUNCHXL_PWMPIN7 PIN_UNASSIGNED
128#define CC1352P1_LAUNCHXL_SPI_FLASH_CS IOID_20
129#define CC1352P1_LAUNCHXL_FLASH_CS_ON 0
130#define CC1352P1_LAUNCHXL_FLASH_CS_OFF 1
133#define CC1352P1_LAUNCHXL_SPI0_MISO IOID_8
134#define CC1352P1_LAUNCHXL_SPI0_MOSI IOID_9
135#define CC1352P1_LAUNCHXL_SPI0_CLK IOID_10
136#define CC1352P1_LAUNCHXL_SPI0_CSN IOID_11
137#define CC1352P1_LAUNCHXL_SPI1_MISO PIN_UNASSIGNED
138#define CC1352P1_LAUNCHXL_SPI1_MOSI PIN_UNASSIGNED
139#define CC1352P1_LAUNCHXL_SPI1_CLK PIN_UNASSIGNED
140#define CC1352P1_LAUNCHXL_SPI1_CSN PIN_UNASSIGNED
143#define CC1352P1_LAUNCHXL_UART0_RX IOID_12
144#define CC1352P1_LAUNCHXL_UART0_TX IOID_13
145#define CC1352P1_LAUNCHXL_UART0_CTS IOID_19
146#define CC1352P1_LAUNCHXL_UART0_RTS IOID_18
147#define CC1352P1_LAUNCHXL_UART1_RX PIN_UNASSIGNED
148#define CC1352P1_LAUNCHXL_UART1_TX PIN_UNASSIGNED
149#define CC1352P1_LAUNCHXL_UART1_CTS PIN_UNASSIGNED
150#define CC1352P1_LAUNCHXL_UART1_RTS PIN_UNASSIGNED
152#define CC1352P1_LAUNCHXL_UART_RX CC1352P1_LAUNCHXL_UART0_RX
153#define CC1352P1_LAUNCHXL_UART_TX CC1352P1_LAUNCHXL_UART0_TX
154#define CC1352P1_LAUNCHXL_UART_CTS CC1352P1_LAUNCHXL_UART0_CTS
155#define CC1352P1_LAUNCHXL_UART_RTS CC1352P1_LAUNCHXL_UART0_RTS
194typedef enum CC1352P1_LAUNCHXL_ADCBufName {
195 CC1352P1_LAUNCHXL_ADCBUF0 = 0,
197 CC1352P1_LAUNCHXL_ADCBUFCOUNT
198} CC1352P1_LAUNCHXL_ADCBufName;
204typedef enum CC1352P1_LAUNCHXL_ADCBuf0ChannelName {
205 CC1352P1_LAUNCHXL_ADCBUF0CHANNEL0 = 0,
206 CC1352P1_LAUNCHXL_ADCBUF0CHANNEL1,
207 CC1352P1_LAUNCHXL_ADCBUF0CHANNEL2,
208 CC1352P1_LAUNCHXL_ADCBUF0CHANNEL3,
209 CC1352P1_LAUNCHXL_ADCBUF0CHANNEL4,
210 CC1352P1_LAUNCHXL_ADCBUF0CHANNELVDDS,
211 CC1352P1_LAUNCHXL_ADCBUF0CHANNELDCOUPL,
212 CC1352P1_LAUNCHXL_ADCBUF0CHANNELVSS,
214 CC1352P1_LAUNCHXL_ADCBUF0CHANNELCOUNT
215} CC1352P1_LAUNCHXL_ADCBuf0ChannelName;
221typedef enum CC1352P1_LAUNCHXL_ADCName {
222 CC1352P1_LAUNCHXL_ADC0 = 0,
223 CC1352P1_LAUNCHXL_ADC1,
224 CC1352P1_LAUNCHXL_ADC2,
225 CC1352P1_LAUNCHXL_ADC3,
226 CC1352P1_LAUNCHXL_ADC4,
227 CC1352P1_LAUNCHXL_ADCDCOUPL,
228 CC1352P1_LAUNCHXL_ADCVSS,
229 CC1352P1_LAUNCHXL_ADCVDDS,
231 CC1352P1_LAUNCHXL_ADCCOUNT
232} CC1352P1_LAUNCHXL_ADCName;
238typedef enum CC1352P1_LAUNCHXL_ECDHName {
239 CC1352P1_LAUNCHXL_ECDH0 = 0,
241 CC1352P1_LAUNCHXL_ECDHCOUNT
242} CC1352P1_LAUNCHXL_ECDHName;
248typedef enum CC1352P1_LAUNCHXL_ECDSAName {
249 CC1352P1_LAUNCHXL_ECDSA0 = 0,
251 CC1352P1_LAUNCHXL_ECDSACOUNT
252} CC1352P1_LAUNCHXL_ECDSAName;
258typedef enum CC1352P1_LAUNCHXL_ECJPAKEName {
259 CC1352P1_LAUNCHXL_ECJPAKE0 = 0,
261 CC1352P1_LAUNCHXL_ECJPAKECOUNT
262} CC1352P1_LAUNCHXL_ECJPAKEName;
268typedef enum CC1352P1_LAUNCHXL_AESCCMName {
269 CC1352P1_LAUNCHXL_AESCCM0 = 0,
271 CC1352P1_LAUNCHXL_AESCCMCOUNT
272} CC1352P1_LAUNCHXL_AESCCMName;
278typedef enum CC1352P1_LAUNCHXL_AESGCMName {
279 CC1352P1_LAUNCHXL_AESGCM0 = 0,
281 CC1352P1_LAUNCHXL_AESGCMCOUNT
282} CC1352P1_LAUNCHXL_AESGCMName;
288typedef enum CC1352P1_LAUNCHXL_AESCBCName {
289 CC1352P1_LAUNCHXL_AESCBC0 = 0,
291 CC1352P1_LAUNCHXL_AESCBCCOUNT
292} CC1352P1_LAUNCHXL_AESCBCName;
298typedef enum CC1352P1_LAUNCHXL_AESCTRName {
299 CC1352P1_LAUNCHXL_AESCTR0 = 0,
301 CC1352P1_LAUNCHXL_AESCTRCOUNT
302} CC1352P1_LAUNCHXL_AESCTRName;
308typedef enum CC1352P1_LAUNCHXL_AESECBName {
309 CC1352P1_LAUNCHXL_AESECB0 = 0,
311 CC1352P1_LAUNCHXL_AESECBCOUNT
312} CC1352P1_LAUNCHXL_AESECBName;
318typedef enum CC1352P1_LAUNCHXL_AESCTRDRBGName {
319 CC1352P1_LAUNCHXL_AESCTRDRBG0 = 0,
321 CC1352P1_LAUNCHXL_AESCTRDRBGCOUNT
322} CC1352P1_LAUNCHXL_AESCTRDRBGName;
328typedef enum CC1352P1_LAUNCHXL_SHA2Name {
329 CC1352P1_LAUNCHXL_SHA20 = 0,
331 CC1352P1_LAUNCHXL_SHA2COUNT
332} CC1352P1_LAUNCHXL_SHA2Name;
338typedef enum CC1352P1_LAUNCHXL_TRNGName {
339 CC1352P1_LAUNCHXL_TRNG0 = 0,
341 CC1352P1_LAUNCHXL_TRNGCOUNT
342} CC1352P1_LAUNCHXL_TRNGName;
348typedef enum CC1352P1_LAUNCHXL_GPIOName {
349 CC1352P1_LAUNCHXL_GPIO_S1 = 0,
350 CC1352P1_LAUNCHXL_GPIO_S2,
351 CC1352P1_LAUNCHXL_SPI_MASTER_READY,
352 CC1352P1_LAUNCHXL_SPI_SLAVE_READY,
353 CC1352P1_LAUNCHXL_GPIO_LED_GREEN,
354 CC1352P1_LAUNCHXL_GPIO_LED_RED,
355 CC1352P1_LAUNCHXL_GPIO_SPI_FLASH_CS,
356 CC1352P1_LAUNCHXL_SDSPI_CS,
357 CC1352P1_LAUNCHXL_GPIOCOUNT
358} CC1352P1_LAUNCHXL_GPIOName;
364typedef enum CC1352P1_LAUNCHXL_GPTimerName {
365 CC1352P1_LAUNCHXL_GPTIMER0A = 0,
366 CC1352P1_LAUNCHXL_GPTIMER0B,
367 CC1352P1_LAUNCHXL_GPTIMER1A,
368 CC1352P1_LAUNCHXL_GPTIMER1B,
369 CC1352P1_LAUNCHXL_GPTIMER2A,
370 CC1352P1_LAUNCHXL_GPTIMER2B,
371 CC1352P1_LAUNCHXL_GPTIMER3A,
372 CC1352P1_LAUNCHXL_GPTIMER3B,
374 CC1352P1_LAUNCHXL_GPTIMERPARTSCOUNT
375} CC1352P1_LAUNCHXL_GPTimerName;
381typedef enum CC1352P1_LAUNCHXL_GPTimers {
382 CC1352P1_LAUNCHXL_GPTIMER0 = 0,
383 CC1352P1_LAUNCHXL_GPTIMER1,
384 CC1352P1_LAUNCHXL_GPTIMER2,
385 CC1352P1_LAUNCHXL_GPTIMER3,
387 CC1352P1_LAUNCHXL_GPTIMERCOUNT
388} CC1352P1_LAUNCHXL_GPTimers;
394typedef enum CC1352P1_LAUNCHXL_I2CName {
395#if TI_I2C_CONF_I2C0_ENABLE
396 CC1352P1_LAUNCHXL_I2C0 = 0,
399 CC1352P1_LAUNCHXL_I2CCOUNT
400} CC1352P1_LAUNCHXL_I2CName;
406typedef enum CC1352P1_LAUNCHXL_I2SName {
407 CC1352P1_LAUNCHXL_I2S0 = 0,
409 CC1352P1_LAUNCHXL_I2SCOUNT
410} CC1352P1_LAUNCHXL_I2SName;
416typedef enum CC1352P1_LAUNCHXL_NVSName {
417#if TI_NVS_CONF_NVS_INTERNAL_ENABLE
418 CC1352P1_LAUNCHXL_NVSCC26XX0 = 0,
420#if TI_NVS_CONF_NVS_EXTERNAL_ENABLE
421 CC1352P1_LAUNCHXL_NVSSPI25X0,
424 CC1352P1_LAUNCHXL_NVSCOUNT
425} CC1352P1_LAUNCHXL_NVSName;
431typedef enum CC1352P1_LAUNCHXL_PWMName {
432 CC1352P1_LAUNCHXL_PWM0 = 0,
433 CC1352P1_LAUNCHXL_PWM1,
434 CC1352P1_LAUNCHXL_PWM2,
435 CC1352P1_LAUNCHXL_PWM3,
436 CC1352P1_LAUNCHXL_PWM4,
437 CC1352P1_LAUNCHXL_PWM5,
438 CC1352P1_LAUNCHXL_PWM6,
439 CC1352P1_LAUNCHXL_PWM7,
441 CC1352P1_LAUNCHXL_PWMCOUNT
442} CC1352P1_LAUNCHXL_PWMName;
448typedef enum CC1352P1_LAUNCHXL_SDName {
449 CC1352P1_LAUNCHXL_SDSPI0 = 0,
451 CC1352P1_LAUNCHXL_SDCOUNT
452} CC1352P1_LAUNCHXL_SDName;
458typedef enum CC1352P1_LAUNCHXL_SPIName {
459#if TI_SPI_CONF_SPI0_ENABLE
460 CC1352P1_LAUNCHXL_SPI0 = 0,
462#if TI_SPI_CONF_SPI1_ENABLE
463 CC1352P1_LAUNCHXL_SPI1,
466 CC1352P1_LAUNCHXL_SPICOUNT
467} CC1352P1_LAUNCHXL_SPIName;
473typedef enum CC1352P1_LAUNCHXL_UARTName {
474#if TI_UART_CONF_UART0_ENABLE
475 CC1352P1_LAUNCHXL_UART0 = 0,
477#if TI_UART_CONF_UART1_ENABLE
478 CC1352P1_LAUNCHXL_UART1,
481 CC1352P1_LAUNCHXL_UARTCOUNT
482} CC1352P1_LAUNCHXL_UARTName;
488typedef enum CC1352P1_LAUNCHXL_UDMAName {
489 CC1352P1_LAUNCHXL_UDMA0 = 0,
491 CC1352P1_LAUNCHXL_UDMACOUNT
492} CC1352P1_LAUNCHXL_UDMAName;
498typedef enum CC1352P1_LAUNCHXL_WatchdogName {
499 CC1352P1_LAUNCHXL_WATCHDOG0 = 0,
501 CC1352P1_LAUNCHXL_WATCHDOGCOUNT
502} CC1352P1_LAUNCHXL_WatchdogName;
void CC1352P1_LAUNCHXL_shutDownExtFlash(void)
Shut down the external flash present on the board files.
void CC1352P1_LAUNCHXL_wakeUpExtFlash(void)
Wake up the external flash present on the board files.
void CC1352P1_LAUNCHXL_initAntennaSwitch(void)
Initializes the antenna switch IOs.
void CC1352P1_LAUNCHXL_initGeneral(void)
Initialize the general board specific settings.