43#include <ti/devices/DeviceFamily.h>
44#include DeviceFamily_constructPath(driverlib/ioc.h)
45#include DeviceFamily_constructPath(driverlib/udma.h)
46#include DeviceFamily_constructPath(inc/hw_ints.h)
47#include DeviceFamily_constructPath(inc/hw_memmap.h)
54#include <ti/drivers/ADCBuf.h>
55#include <ti/drivers/adcbuf/ADCBufCC26X2.h>
57ADCBufCC26X2_Object adcBufCC26xxObjects[CC1352P1_LAUNCHXL_ADCBUFCOUNT];
66const ADCBufCC26X2_AdcChannelLutEntry ADCBufCC26X2_adcChannelLut[CC1352P1_LAUNCHXL_ADCBUF0CHANNELCOUNT] = {
67 {CC1352P1_LAUNCHXL_DIO23_ANALOG, ADC_COMPB_IN_AUXIO7},
68 {CC1352P1_LAUNCHXL_DIO24_ANALOG, ADC_COMPB_IN_AUXIO6},
69 {CC1352P1_LAUNCHXL_DIO25_ANALOG, ADC_COMPB_IN_AUXIO5},
70 {CC1352P1_LAUNCHXL_DIO26_ANALOG, ADC_COMPB_IN_AUXIO4},
71 {CC1352P1_LAUNCHXL_DIO27_ANALOG, ADC_COMPB_IN_AUXIO3},
72 {PIN_UNASSIGNED, ADC_COMPB_IN_VDDS},
73 {PIN_UNASSIGNED, ADC_COMPB_IN_DCOUPL},
74 {PIN_UNASSIGNED, ADC_COMPB_IN_VSS},
77const ADCBufCC26X2_HWAttrs adcBufCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADCBUFCOUNT] = {
81 .adcChannelLut = ADCBufCC26X2_adcChannelLut,
82 .gpTimerUnit = CC1352P1_LAUNCHXL_GPTIMER0A,
86const ADCBuf_Config ADCBuf_config[CC1352P1_LAUNCHXL_ADCBUFCOUNT] = {
88 &ADCBufCC26X2_fxnTable,
89 &adcBufCC26xxObjects[CC1352P1_LAUNCHXL_ADCBUF0],
90 &adcBufCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADCBUF0]
94const uint_least8_t ADCBuf_count = CC1352P1_LAUNCHXL_ADCBUFCOUNT;
99#include <ti/drivers/ADC.h>
100#include <ti/drivers/adc/ADCCC26XX.h>
102ADCCC26XX_Object adcCC26xxObjects[CC1352P1_LAUNCHXL_ADCCOUNT];
104const ADCCC26XX_HWAttrs adcCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADCCOUNT] = {
106 .adcDIO = CC1352P1_LAUNCHXL_DIO23_ANALOG,
107 .adcCompBInput = ADC_COMPB_IN_AUXIO7,
108 .refSource = ADCCC26XX_FIXED_REFERENCE,
109 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
110 .inputScalingEnabled =
true,
111 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
112 .returnAdjustedVal =
false
115 .adcDIO = CC1352P1_LAUNCHXL_DIO24_ANALOG,
116 .adcCompBInput = ADC_COMPB_IN_AUXIO6,
117 .refSource = ADCCC26XX_FIXED_REFERENCE,
118 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
119 .inputScalingEnabled =
true,
120 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
121 .returnAdjustedVal =
false
124 .adcDIO = CC1352P1_LAUNCHXL_DIO25_ANALOG,
125 .adcCompBInput = ADC_COMPB_IN_AUXIO5,
126 .refSource = ADCCC26XX_FIXED_REFERENCE,
127 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
128 .inputScalingEnabled =
true,
129 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
130 .returnAdjustedVal =
false
133 .adcDIO = CC1352P1_LAUNCHXL_DIO26_ANALOG,
134 .adcCompBInput = ADC_COMPB_IN_AUXIO4,
135 .refSource = ADCCC26XX_FIXED_REFERENCE,
136 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
137 .inputScalingEnabled =
true,
138 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
139 .returnAdjustedVal =
false
142 .adcDIO = CC1352P1_LAUNCHXL_DIO27_ANALOG,
143 .adcCompBInput = ADC_COMPB_IN_AUXIO3,
144 .refSource = ADCCC26XX_FIXED_REFERENCE,
145 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
146 .inputScalingEnabled =
true,
147 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
148 .returnAdjustedVal =
false
151 .adcDIO = PIN_UNASSIGNED,
152 .adcCompBInput = ADC_COMPB_IN_DCOUPL,
153 .refSource = ADCCC26XX_FIXED_REFERENCE,
154 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
155 .inputScalingEnabled =
true,
156 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
157 .returnAdjustedVal =
false
160 .adcDIO = PIN_UNASSIGNED,
161 .adcCompBInput = ADC_COMPB_IN_VSS,
162 .refSource = ADCCC26XX_FIXED_REFERENCE,
163 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
164 .inputScalingEnabled =
true,
165 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
166 .returnAdjustedVal =
false
169 .adcDIO = PIN_UNASSIGNED,
170 .adcCompBInput = ADC_COMPB_IN_VDDS,
171 .refSource = ADCCC26XX_FIXED_REFERENCE,
172 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
173 .inputScalingEnabled =
true,
174 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
175 .returnAdjustedVal =
false
179const ADC_Config ADC_config[CC1352P1_LAUNCHXL_ADCCOUNT] = {
180 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[CC1352P1_LAUNCHXL_ADC0], &adcCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADC0]},
181 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[CC1352P1_LAUNCHXL_ADC1], &adcCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADC1]},
182 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[CC1352P1_LAUNCHXL_ADC2], &adcCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADC2]},
183 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[CC1352P1_LAUNCHXL_ADC3], &adcCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADC3]},
184 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[CC1352P1_LAUNCHXL_ADC4], &adcCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADC4]},
185 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[CC1352P1_LAUNCHXL_ADCDCOUPL], &adcCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADCDCOUPL]},
186 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[CC1352P1_LAUNCHXL_ADCVSS], &adcCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADCVSS]},
187 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[CC1352P1_LAUNCHXL_ADCVDDS], &adcCC26xxHWAttrs[CC1352P1_LAUNCHXL_ADCVDDS]},
190const uint_least8_t ADC_count = CC1352P1_LAUNCHXL_ADCCOUNT;
195#include <ti/drivers/ECDH.h>
196#include <ti/drivers/ecdh/ECDHCC26X2.h>
198ECDHCC26X2_Object ecdhCC26X2Objects[CC1352P1_LAUNCHXL_ECDHCOUNT];
200const ECDHCC26X2_HWAttrs ecdhCC26X2HWAttrs[CC1352P1_LAUNCHXL_ECDHCOUNT] = {
206const ECDH_Config ECDH_config[CC1352P1_LAUNCHXL_ECDHCOUNT] = {
208 .object = &ecdhCC26X2Objects[CC1352P1_LAUNCHXL_ECDH0],
209 .hwAttrs = &ecdhCC26X2HWAttrs[CC1352P1_LAUNCHXL_ECDH0]
213const uint_least8_t ECDH_count = CC1352P1_LAUNCHXL_ECDHCOUNT;
218#include <ti/drivers/ECDSA.h>
219#include <ti/drivers/ecdsa/ECDSACC26X2.h>
221ECDSACC26X2_Object ecdsaCC26X2Objects[CC1352P1_LAUNCHXL_ECDSACOUNT];
223const ECDSACC26X2_HWAttrs ecdsaCC26X2HWAttrs[CC1352P1_LAUNCHXL_ECDSACOUNT] = {
229const ECDSA_Config ECDSA_config[CC1352P1_LAUNCHXL_ECDSACOUNT] = {
231 .object = &ecdsaCC26X2Objects[CC1352P1_LAUNCHXL_ECDSA0],
232 .hwAttrs = &ecdsaCC26X2HWAttrs[CC1352P1_LAUNCHXL_ECDSA0]
236const uint_least8_t ECDSA_count = CC1352P1_LAUNCHXL_ECDSACOUNT;
241#include <ti/drivers/ECJPAKE.h>
242#include <ti/drivers/ecjpake/ECJPAKECC26X2.h>
244ECJPAKECC26X2_Object ecjpakeCC26X2Objects[CC1352P1_LAUNCHXL_ECJPAKECOUNT];
246const ECJPAKECC26X2_HWAttrs ecjpakeCC26X2HWAttrs[CC1352P1_LAUNCHXL_ECJPAKECOUNT] = {
252const ECJPAKE_Config ECJPAKE_config[CC1352P1_LAUNCHXL_ECJPAKECOUNT] = {
254 .object = &ecjpakeCC26X2Objects[CC1352P1_LAUNCHXL_ECJPAKE0],
255 .hwAttrs = &ecjpakeCC26X2HWAttrs[CC1352P1_LAUNCHXL_ECJPAKE0]
259const uint_least8_t ECJPAKE_count = CC1352P1_LAUNCHXL_ECJPAKECOUNT;
265#include <ti/drivers/SHA2.h>
266#include <ti/drivers/sha2/SHA2CC26X2.h>
268SHA2CC26X2_Object sha2CC26X2Objects[CC1352P1_LAUNCHXL_SHA2COUNT];
270const SHA2CC26X2_HWAttrs sha2CC26X2HWAttrs[CC1352P1_LAUNCHXL_SHA2COUNT] = {
276const SHA2_Config SHA2_config[CC1352P1_LAUNCHXL_SHA2COUNT] = {
278 .object = &sha2CC26X2Objects[CC1352P1_LAUNCHXL_SHA20],
279 .hwAttrs = &sha2CC26X2HWAttrs[CC1352P1_LAUNCHXL_SHA20]
283const uint_least8_t SHA2_count = CC1352P1_LAUNCHXL_SHA2COUNT;
288#include <ti/drivers/AESCCM.h>
289#include <ti/drivers/aesccm/AESCCMCC26XX.h>
291AESCCMCC26XX_Object aesccmCC26XXObjects[CC1352P1_LAUNCHXL_AESCCMCOUNT];
293const AESCCMCC26XX_HWAttrs aesccmCC26XXHWAttrs[CC1352P1_LAUNCHXL_AESCCMCOUNT] = {
299const AESCCM_Config AESCCM_config[CC1352P1_LAUNCHXL_AESCCMCOUNT] = {
301 .object = &aesccmCC26XXObjects[CC1352P1_LAUNCHXL_AESCCM0],
302 .hwAttrs = &aesccmCC26XXHWAttrs[CC1352P1_LAUNCHXL_AESCCM0]
306const uint_least8_t AESCCM_count = CC1352P1_LAUNCHXL_AESCCMCOUNT;
311#include <ti/drivers/AESGCM.h>
312#include <ti/drivers/aesgcm/AESGCMCC26XX.h>
314AESGCMCC26XX_Object aesgcmCC26XXObjects[CC1352P1_LAUNCHXL_AESGCMCOUNT];
316const AESGCMCC26XX_HWAttrs aesgcmCC26XXHWAttrs[CC1352P1_LAUNCHXL_AESGCMCOUNT] = {
322const AESGCM_Config AESGCM_config[CC1352P1_LAUNCHXL_AESGCMCOUNT] = {
324 .object = &aesgcmCC26XXObjects[CC1352P1_LAUNCHXL_AESGCM0],
325 .hwAttrs = &aesgcmCC26XXHWAttrs[CC1352P1_LAUNCHXL_AESGCM0]
329const uint_least8_t AESGCM_count = CC1352P1_LAUNCHXL_AESGCMCOUNT;
334#include <ti/drivers/AESCBC.h>
335#include <ti/drivers/aescbc/AESCBCCC26XX.h>
337AESCBCCC26XX_Object aescbcCC26XXObjects[CC1352P1_LAUNCHXL_AESCBCCOUNT];
339const AESCBCCC26XX_HWAttrs aescbcCC26XXHWAttrs[CC1352P1_LAUNCHXL_AESCBCCOUNT] = {
345const AESCBC_Config AESCBC_config[CC1352P1_LAUNCHXL_AESCBCCOUNT] = {
347 .object = &aescbcCC26XXObjects[CC1352P1_LAUNCHXL_AESCBC0],
348 .hwAttrs = &aescbcCC26XXHWAttrs[CC1352P1_LAUNCHXL_AESCBC0]
352const uint_least8_t AESCBC_count = CC1352P1_LAUNCHXL_AESCBCCOUNT;
357#include <ti/drivers/AESCTR.h>
358#include <ti/drivers/aesctr/AESCTRCC26XX.h>
360AESCTRCC26XX_Object aesctrCC26XXObjects[CC1352P1_LAUNCHXL_AESCTRCOUNT];
362const AESCTRCC26XX_HWAttrs aesctrCC26XXHWAttrs[CC1352P1_LAUNCHXL_AESCTRCOUNT] = {
368const AESCTR_Config AESCTR_config[CC1352P1_LAUNCHXL_AESCTRCOUNT] = {
370 .object = &aesctrCC26XXObjects[CC1352P1_LAUNCHXL_AESCTR0],
371 .hwAttrs = &aesctrCC26XXHWAttrs[CC1352P1_LAUNCHXL_AESCTR0]
375const uint_least8_t AESCTR_count = CC1352P1_LAUNCHXL_AESCTRCOUNT;
380#include <ti/drivers/AESECB.h>
381#include <ti/drivers/aesecb/AESECBCC26XX.h>
383AESECBCC26XX_Object aesecbCC26XXObjects[CC1352P1_LAUNCHXL_AESECBCOUNT];
385const AESECBCC26XX_HWAttrs aesecbCC26XXHWAttrs[CC1352P1_LAUNCHXL_AESECBCOUNT] = {
391const AESECB_Config AESECB_config[CC1352P1_LAUNCHXL_AESECBCOUNT] = {
393 .object = &aesecbCC26XXObjects[CC1352P1_LAUNCHXL_AESECB0],
394 .hwAttrs = &aesecbCC26XXHWAttrs[CC1352P1_LAUNCHXL_AESECB0]
398const uint_least8_t AESECB_count = CC1352P1_LAUNCHXL_AESECBCOUNT;
403#include <ti/drivers/AESCTRDRBG.h>
404#include <ti/drivers/aesctrdrbg/AESCTRDRBGXX.h>
406AESCTRDRBGXX_Object aesctrdrbgXXObjects[CC1352P1_LAUNCHXL_AESCTRDRBGCOUNT];
408const AESCTRDRBGXX_HWAttrs aesctrdrbgXXHWAttrs[CC1352P1_LAUNCHXL_AESCTRDRBGCOUNT] = {
410 .aesctrIndex = CC1352P1_LAUNCHXL_AESCTR0,
414const AESCTRDRBG_Config AESCTRDRBG_config[CC1352P1_LAUNCHXL_AESCTRDRBGCOUNT] = {
416 .object = &aesctrdrbgXXObjects[CC1352P1_LAUNCHXL_AESCTRDRBG0],
417 .hwAttrs = &aesctrdrbgXXHWAttrs[CC1352P1_LAUNCHXL_AESCTRDRBG0]
421const uint_least8_t AESCTRDRBG_count = CC1352P1_LAUNCHXL_AESCTRDRBGCOUNT;
426#include <ti/drivers/TRNG.h>
427#include <ti/drivers/trng/TRNGCC26XX.h>
429TRNGCC26XX_Object trngCC26XXObjects[CC1352P1_LAUNCHXL_TRNGCOUNT];
431const TRNGCC26XX_HWAttrs trngCC26X2HWAttrs[CC1352P1_LAUNCHXL_TRNGCOUNT] = {
435 .samplesPerCycle = 240000,
439const TRNG_Config TRNG_config[CC1352P1_LAUNCHXL_TRNGCOUNT] = {
441 .object = &trngCC26XXObjects[CC1352P1_LAUNCHXL_TRNG0],
442 .hwAttrs = &trngCC26X2HWAttrs[CC1352P1_LAUNCHXL_TRNG0]
446const uint_least8_t TRNG_count = CC1352P1_LAUNCHXL_TRNGCOUNT;
451#include <ti/drivers/GPIO.h>
452#include <ti/drivers/gpio/GPIOCC26XX.h>
462GPIO_PinConfig gpioPinConfigs[] = {
464 GPIOCC26XX_DIO_15 | GPIO_DO_NOT_CONFIG,
465 GPIOCC26XX_DIO_14 | GPIO_DO_NOT_CONFIG,
467 GPIOCC26XX_DIO_15 | GPIO_DO_NOT_CONFIG,
468 GPIOCC26XX_DIO_21 | GPIO_DO_NOT_CONFIG,
471 GPIOCC26XX_DIO_07 | GPIO_DO_NOT_CONFIG,
472 GPIOCC26XX_DIO_06 | GPIO_DO_NOT_CONFIG,
475 GPIOCC26XX_DIO_20 | GPIO_DO_NOT_CONFIG,
487 GPIOCC26XX_DIO_14 | GPIO_DO_NOT_CONFIG,
497GPIO_CallbackFxn gpioCallbackFunctions[] = {
504const GPIOCC26XX_Config GPIOCC26XX_config = {
505 .pinConfigs = (GPIO_PinConfig *)gpioPinConfigs,
506 .callbacks = (GPIO_CallbackFxn *)gpioCallbackFunctions,
507 .numberOfPinConfigs = CC1352P1_LAUNCHXL_GPIOCOUNT,
508 .numberOfCallbacks =
sizeof(gpioCallbackFunctions)/
sizeof(GPIO_CallbackFxn),
516#include <ti/drivers/timer/GPTimerCC26XX.h>
518GPTimerCC26XX_Object gptimerCC26XXObjects[CC1352P1_LAUNCHXL_GPTIMERCOUNT];
520const GPTimerCC26XX_HWAttrs gptimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_GPTIMERPARTSCOUNT] = {
521 { .baseAddr = GPT0_BASE, .intNum = INT_GPT0A, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT0, .pinMux = GPT_PIN_0A, },
522 { .baseAddr = GPT0_BASE, .intNum = INT_GPT0B, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT0, .pinMux = GPT_PIN_0B, },
523 { .baseAddr = GPT1_BASE, .intNum = INT_GPT1A, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT1, .pinMux = GPT_PIN_1A, },
524 { .baseAddr = GPT1_BASE, .intNum = INT_GPT1B, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT1, .pinMux = GPT_PIN_1B, },
525 { .baseAddr = GPT2_BASE, .intNum = INT_GPT2A, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT2, .pinMux = GPT_PIN_2A, },
526 { .baseAddr = GPT2_BASE, .intNum = INT_GPT2B, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT2, .pinMux = GPT_PIN_2B, },
527 { .baseAddr = GPT3_BASE, .intNum = INT_GPT3A, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT3, .pinMux = GPT_PIN_3A, },
528 { .baseAddr = GPT3_BASE, .intNum = INT_GPT3B, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT3, .pinMux = GPT_PIN_3B, },
531const GPTimerCC26XX_Config GPTimerCC26XX_config[CC1352P1_LAUNCHXL_GPTIMERPARTSCOUNT] = {
532 { &gptimerCC26XXObjects[CC1352P1_LAUNCHXL_GPTIMER0], &gptimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_GPTIMER0A], GPT_A },
533 { &gptimerCC26XXObjects[CC1352P1_LAUNCHXL_GPTIMER0], &gptimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_GPTIMER0B], GPT_B },
534 { &gptimerCC26XXObjects[CC1352P1_LAUNCHXL_GPTIMER1], &gptimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_GPTIMER1A], GPT_A },
535 { &gptimerCC26XXObjects[CC1352P1_LAUNCHXL_GPTIMER1], &gptimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_GPTIMER1B], GPT_B },
536 { &gptimerCC26XXObjects[CC1352P1_LAUNCHXL_GPTIMER2], &gptimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_GPTIMER2A], GPT_A },
537 { &gptimerCC26XXObjects[CC1352P1_LAUNCHXL_GPTIMER2], &gptimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_GPTIMER2B], GPT_B },
538 { &gptimerCC26XXObjects[CC1352P1_LAUNCHXL_GPTIMER3], &gptimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_GPTIMER3A], GPT_A },
539 { &gptimerCC26XXObjects[CC1352P1_LAUNCHXL_GPTIMER3], &gptimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_GPTIMER3B], GPT_B },
545#include <ti/drivers/I2C.h>
546#include <ti/drivers/i2c/I2CCC26XX.h>
548#if TI_I2C_CONF_ENABLE
550I2CCC26XX_Object i2cCC26xxObjects[CC1352P1_LAUNCHXL_I2CCOUNT];
552const I2CCC26XX_HWAttrsV1 i2cCC26xxHWAttrs[CC1352P1_LAUNCHXL_I2CCOUNT] = {
553#if TI_I2C_CONF_I2C0_ENABLE
555 .baseAddr = I2C0_BASE,
556 .powerMngrId = PowerCC26XX_PERIPH_I2C0,
557 .intNum = INT_I2C_IRQ,
560 .sdaPin = CC1352P1_LAUNCHXL_I2C0_SDA0,
561 .sclPin = CC1352P1_LAUNCHXL_I2C0_SCL0,
566const I2C_Config I2C_config[CC1352P1_LAUNCHXL_I2CCOUNT] = {
567#if TI_I2C_CONF_I2C0_ENABLE
569 .fxnTablePtr = &I2CCC26XX_fxnTable,
570 .object = &i2cCC26xxObjects[CC1352P1_LAUNCHXL_I2C0],
571 .hwAttrs = &i2cCC26xxHWAttrs[CC1352P1_LAUNCHXL_I2C0]
576const uint_least8_t I2C_count = CC1352P1_LAUNCHXL_I2CCOUNT;
583#include <ti/drivers/I2S.h>
584#include <ti/drivers/i2s/I2SCC26XX.h>
586I2SCC26XX_Object i2sCC26XXObjects[CC1352P1_LAUNCHXL_I2SCOUNT];
588const I2SCC26XX_HWAttrs i2sCC26XXHWAttrs[CC1352P1_LAUNCHXL_I2SCOUNT] = {
590 .pinSD1 = CC1352P1_LAUNCHXL_I2S_ADI,
591 .pinSD0 = CC1352P1_LAUNCHXL_I2S_ADO,
592 .pinSCK = CC1352P1_LAUNCHXL_I2S_BCLK,
593 .pinMCLK = CC1352P1_LAUNCHXL_I2S_MCLK,
594 .pinWS = CC1352P1_LAUNCHXL_I2S_WCLK,
599const I2S_Config I2S_config[CC1352P1_LAUNCHXL_I2SCOUNT] = {
601 .object = &i2sCC26XXObjects[CC1352P1_LAUNCHXL_I2S0],
602 .hwAttrs = &i2sCC26XXHWAttrs[CC1352P1_LAUNCHXL_I2S0]
606const uint_least8_t I2S_count = CC1352P1_LAUNCHXL_I2SCOUNT;
611#include <ti/drivers/NVS.h>
612#include <ti/drivers/nvs/NVSSPI25X.h>
613#include <ti/drivers/nvs/NVSCC26XX.h>
615#define NVS_REGIONS_BASE 0x48000
616#define SECTORSIZE 0x2000
617#define REGIONSIZE (SECTORSIZE * 4)
619#if TI_NVS_CONF_ENABLE
621#if TI_NVS_CONF_NVS_INTERNAL_ENABLE
627#if defined(__TI_COMPILER_VERSION__)
632#pragma LOCATION(flashBuf, NVS_REGIONS_BASE);
633#pragma NOINIT(flashBuf);
634static char flashBuf[REGIONSIZE];
636#elif defined(__IAR_SYSTEMS_ICC__)
641static __no_init
char flashBuf[REGIONSIZE] @ NVS_REGIONS_BASE;
643#elif defined(__GNUC__)
655__attribute__ ((section (
".nvs")))
656static
char flashBuf[REGIONSIZE];
661NVSCC26XX_Object nvsCC26xxObjects[1];
664const NVSCC26XX_HWAttrs nvsCC26xxHWAttrs[1] = {
666 .regionBase = (
void *)flashBuf,
667 .regionSize = REGIONSIZE,
673#if TI_NVS_CONF_NVS_EXTERNAL_ENABLE
675#define SPISECTORSIZE 0x1000
676#define SPIREGIONSIZE (SPISECTORSIZE * 32)
677#define VERIFYBUFSIZE 64
679static uint8_t verifyBuf[VERIFYBUFSIZE];
682NVSSPI25X_Object nvsSPI25XObjects[1];
685const NVSSPI25X_HWAttrs nvsSPI25XHWAttrs[1] = {
687 .regionBaseOffset = 0,
688 .regionSize = SPIREGIONSIZE,
689 .sectorSize = SPISECTORSIZE,
690 .verifyBuf = verifyBuf,
691 .verifyBufSize = VERIFYBUFSIZE,
694 .spiBitRate = 4000000,
695 .spiCsnGpioIndex = CC1352P1_LAUNCHXL_GPIO_SPI_FLASH_CS,
696 .statusPollDelayUs = 100,
703const NVS_Config NVS_config[CC1352P1_LAUNCHXL_NVSCOUNT] = {
704#if TI_NVS_CONF_NVS_INTERNAL_ENABLE
706 .fxnTablePtr = &NVSCC26XX_fxnTable,
707 .object = &nvsCC26xxObjects[0],
708 .hwAttrs = &nvsCC26xxHWAttrs[0],
711#if TI_NVS_CONF_NVS_EXTERNAL_ENABLE
713 .fxnTablePtr = &NVSSPI25X_fxnTable,
714 .object = &nvsSPI25XObjects[0],
715 .hwAttrs = &nvsSPI25XHWAttrs[0],
720const uint_least8_t NVS_count = CC1352P1_LAUNCHXL_NVSCOUNT;
727#include <ti/drivers/PIN.h>
728#include <ti/drivers/pin/PINCC26XX.h>
730const PIN_Config BoardGpioInitTable[] = {
732 CC1352P1_LAUNCHXL_PIN_RLED | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX,
733 CC1352P1_LAUNCHXL_PIN_GLED | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX,
734 CC1352P1_LAUNCHXL_PIN_BTN1 | PIN_INPUT_EN | PIN_PULLUP | PIN_IRQ_BOTHEDGES | PIN_HYSTERESIS,
735 CC1352P1_LAUNCHXL_PIN_BTN2 | PIN_INPUT_EN | PIN_PULLUP | PIN_IRQ_BOTHEDGES | PIN_HYSTERESIS,
736 CC1352P1_LAUNCHXL_SPI_FLASH_CS | PIN_GPIO_OUTPUT_EN | PIN_GPIO_HIGH | PIN_PUSHPULL | PIN_DRVSTR_MIN,
737 CC1352P1_LAUNCHXL_UART0_RX | PIN_INPUT_EN | PIN_PULLDOWN,
738 CC1352P1_LAUNCHXL_UART0_TX | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL,
739 CC1352P1_LAUNCHXL_SPI0_MOSI | PIN_INPUT_EN | PIN_PULLDOWN,
740 CC1352P1_LAUNCHXL_SPI0_MISO | PIN_INPUT_EN | PIN_PULLDOWN,
741 CC1352P1_LAUNCHXL_SPI0_CLK | PIN_INPUT_EN | PIN_PULLDOWN,
742 CC1352P1_LAUNCHXL_DIO28_RF_24GHZ | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX,
743 CC1352P1_LAUNCHXL_DIO29_RF_HIGH_PA | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX,
744 CC1352P1_LAUNCHXL_DIO30_RF_SUB1GHZ | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX,
748const PINCC26XX_HWAttrs PINCC26XX_hwAttrs = {
756#include <ti/drivers/Power.h>
757#include <ti/drivers/power/PowerCC26X2.h>
760const PowerCC26X2_Config PowerCC26X2_config = {
761 .policyInitFxn = NULL,
763 .calibrateFxn = &PowerCC26XX_calibrate,
764 .enablePolicy =
true,
765 .calibrateRCOSC_LF =
true,
766 .calibrateRCOSC_HF =
true,
773#include <ti/drivers/PWM.h>
774#include <ti/drivers/pwm/PWMTimerCC26XX.h>
776PWMTimerCC26XX_Object pwmtimerCC26xxObjects[CC1352P1_LAUNCHXL_PWMCOUNT];
778const PWMTimerCC26XX_HwAttrs pwmtimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_PWMCOUNT] = {
779 { .pwmPin = CC1352P1_LAUNCHXL_PWMPIN0, .gpTimerUnit = CC1352P1_LAUNCHXL_GPTIMER0A },
780 { .pwmPin = CC1352P1_LAUNCHXL_PWMPIN1, .gpTimerUnit = CC1352P1_LAUNCHXL_GPTIMER0B },
781 { .pwmPin = CC1352P1_LAUNCHXL_PWMPIN2, .gpTimerUnit = CC1352P1_LAUNCHXL_GPTIMER1A },
782 { .pwmPin = CC1352P1_LAUNCHXL_PWMPIN3, .gpTimerUnit = CC1352P1_LAUNCHXL_GPTIMER1B },
783 { .pwmPin = CC1352P1_LAUNCHXL_PWMPIN4, .gpTimerUnit = CC1352P1_LAUNCHXL_GPTIMER2A },
784 { .pwmPin = CC1352P1_LAUNCHXL_PWMPIN5, .gpTimerUnit = CC1352P1_LAUNCHXL_GPTIMER2B },
785 { .pwmPin = CC1352P1_LAUNCHXL_PWMPIN6, .gpTimerUnit = CC1352P1_LAUNCHXL_GPTIMER3A },
786 { .pwmPin = CC1352P1_LAUNCHXL_PWMPIN7, .gpTimerUnit = CC1352P1_LAUNCHXL_GPTIMER3B },
789const PWM_Config PWM_config[CC1352P1_LAUNCHXL_PWMCOUNT] = {
790 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[CC1352P1_LAUNCHXL_PWM0], &pwmtimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_PWM0] },
791 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[CC1352P1_LAUNCHXL_PWM1], &pwmtimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_PWM1] },
792 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[CC1352P1_LAUNCHXL_PWM2], &pwmtimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_PWM2] },
793 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[CC1352P1_LAUNCHXL_PWM3], &pwmtimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_PWM3] },
794 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[CC1352P1_LAUNCHXL_PWM4], &pwmtimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_PWM4] },
795 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[CC1352P1_LAUNCHXL_PWM5], &pwmtimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_PWM5] },
796 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[CC1352P1_LAUNCHXL_PWM6], &pwmtimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_PWM6] },
797 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[CC1352P1_LAUNCHXL_PWM7], &pwmtimerCC26xxHWAttrs[CC1352P1_LAUNCHXL_PWM7] },
800const uint_least8_t PWM_count = CC1352P1_LAUNCHXL_PWMCOUNT;
805#include <ti/drivers/rf/RF.h>
814extern void rfDriverCallback(RF_Handle client, RF_GlobalEvent events,
void* arg);
816const RFCC26XX_HWAttrsV2 RFCC26XX_hwAttrs = {
819 .xoscHfAlwaysNeeded =
true,
822 .globalCallback = &rfDriverCallback,
825 .globalEventMask = RF_GlobalEventRadioSetup | RF_GlobalEventRadioPowerDown
831#include <ti/drivers/SD.h>
832#include <ti/drivers/sd/SDSPI.h>
836#if !(TI_SPI_CONF_SPI0_ENABLE)
837#error "SD driver requires SPI0 enabled"
840SDSPI_Object sdspiObjects[CC1352P1_LAUNCHXL_SDCOUNT];
842const SDSPI_HWAttrs sdspiHWAttrs[CC1352P1_LAUNCHXL_SDCOUNT] = {
844 .spiIndex = CC1352P1_LAUNCHXL_SPI0,
845 .spiCsGpioIndex = CC1352P1_LAUNCHXL_SDSPI_CS
849const SD_Config SD_config[CC1352P1_LAUNCHXL_SDCOUNT] = {
851 .fxnTablePtr = &SDSPI_fxnTable,
852 .object = &sdspiObjects[CC1352P1_LAUNCHXL_SDSPI0],
853 .hwAttrs = &sdspiHWAttrs[CC1352P1_LAUNCHXL_SDSPI0]
857const uint_least8_t SD_count = CC1352P1_LAUNCHXL_SDCOUNT;
864#include <ti/drivers/SPI.h>
865#include <ti/drivers/spi/SPICC26X2DMA.h>
867#if TI_SPI_CONF_ENABLE
869SPICC26X2DMA_Object spiCC26X2DMAObjects[CC1352P1_LAUNCHXL_SPICOUNT];
876const SPICC26X2DMA_HWAttrs spiCC26X2DMAHWAttrs[CC1352P1_LAUNCHXL_SPICOUNT] = {
877#if TI_SPI_CONF_SPI0_ENABLE
880 .intNum = INT_SSI0_COMB,
883 .powerMngrId = PowerCC26XX_PERIPH_SSI0,
884 .defaultTxBufValue = 0xFF,
885 .rxChannelBitMask = 1<<UDMA_CHAN_SSI0_RX,
886 .txChannelBitMask = 1<<UDMA_CHAN_SSI0_TX,
887 .mosiPin = CC1352P1_LAUNCHXL_SPI0_MOSI,
888 .misoPin = CC1352P1_LAUNCHXL_SPI0_MISO,
889 .clkPin = CC1352P1_LAUNCHXL_SPI0_CLK,
890 .csnPin = CC1352P1_LAUNCHXL_SPI0_CSN,
891 .minDmaTransferSize = 10
894#if TI_SPI_CONF_SPI1_ENABLE
897 .intNum = INT_SSI1_COMB,
900 .powerMngrId = PowerCC26XX_PERIPH_SSI1,
901 .defaultTxBufValue = 0xFF,
902 .rxChannelBitMask = 1<<UDMA_CHAN_SSI1_RX,
903 .txChannelBitMask = 1<<UDMA_CHAN_SSI1_TX,
904 .mosiPin = CC1352P1_LAUNCHXL_SPI1_MOSI,
905 .misoPin = CC1352P1_LAUNCHXL_SPI1_MISO,
906 .clkPin = CC1352P1_LAUNCHXL_SPI1_CLK,
907 .csnPin = CC1352P1_LAUNCHXL_SPI1_CSN,
908 .minDmaTransferSize = 10
913const SPI_Config SPI_config[CC1352P1_LAUNCHXL_SPICOUNT] = {
914#if TI_SPI_CONF_SPI0_ENABLE
916 .fxnTablePtr = &SPICC26X2DMA_fxnTable,
917 .object = &spiCC26X2DMAObjects[CC1352P1_LAUNCHXL_SPI0],
918 .hwAttrs = &spiCC26X2DMAHWAttrs[CC1352P1_LAUNCHXL_SPI0]
921#if TI_SPI_CONF_SPI1_ENABLE
923 .fxnTablePtr = &SPICC26X2DMA_fxnTable,
924 .object = &spiCC26X2DMAObjects[CC1352P1_LAUNCHXL_SPI1],
925 .hwAttrs = &spiCC26X2DMAHWAttrs[CC1352P1_LAUNCHXL_SPI1]
930const uint_least8_t SPI_count = CC1352P1_LAUNCHXL_SPICOUNT;
937#include <ti/drivers/UART.h>
938#include <ti/drivers/uart/UARTCC26XX.h>
940#if TI_UART_CONF_ENABLE
942UARTCC26XX_Object uartCC26XXObjects[CC1352P1_LAUNCHXL_UARTCOUNT];
944uint8_t uartCC26XXRingBuffer[CC1352P1_LAUNCHXL_UARTCOUNT][32];
946const UARTCC26XX_HWAttrsV2 uartCC26XXHWAttrs[CC1352P1_LAUNCHXL_UARTCOUNT] = {
947#if TI_UART_CONF_UART0_ENABLE
949 .baseAddr = UART0_BASE,
950 .powerMngrId = PowerCC26XX_PERIPH_UART0,
951 .intNum = INT_UART0_COMB,
954 .txPin = CC1352P1_LAUNCHXL_UART0_TX,
955 .rxPin = CC1352P1_LAUNCHXL_UART0_RX,
956 .ctsPin = PIN_UNASSIGNED,
957 .rtsPin = PIN_UNASSIGNED,
958 .ringBufPtr = uartCC26XXRingBuffer[CC1352P1_LAUNCHXL_UART0],
959 .ringBufSize =
sizeof(uartCC26XXRingBuffer[CC1352P1_LAUNCHXL_UART0]),
960 .txIntFifoThr = UARTCC26XX_FIFO_THRESHOLD_1_8,
961 .rxIntFifoThr = UARTCC26XX_FIFO_THRESHOLD_4_8,
965#if TI_UART_CONF_UART1_ENABLE
967 .baseAddr = UART1_BASE,
968 .powerMngrId = PowerCC26X2_PERIPH_UART1,
969 .intNum = INT_UART1_COMB,
972 .txPin = CC1352P1_LAUNCHXL_UART1_TX,
973 .rxPin = CC1352P1_LAUNCHXL_UART1_RX,
974 .ctsPin = PIN_UNASSIGNED,
975 .rtsPin = PIN_UNASSIGNED,
976 .ringBufPtr = uartCC26XXRingBuffer[CC1352P1_LAUNCHXL_UART1],
977 .ringBufSize =
sizeof(uartCC26XXRingBuffer[CC1352P1_LAUNCHXL_UART1]),
978 .txIntFifoThr = UARTCC26XX_FIFO_THRESHOLD_1_8,
979 .rxIntFifoThr = UARTCC26XX_FIFO_THRESHOLD_4_8,
985const UART_Config UART_config[CC1352P1_LAUNCHXL_UARTCOUNT] = {
986#if TI_UART_CONF_UART0_ENABLE
988 .fxnTablePtr = &UARTCC26XX_fxnTable,
989 .object = &uartCC26XXObjects[CC1352P1_LAUNCHXL_UART0],
990 .hwAttrs = &uartCC26XXHWAttrs[CC1352P1_LAUNCHXL_UART0]
993#if TI_UART_CONF_UART1_ENABLE
995 .fxnTablePtr = &UARTCC26XX_fxnTable,
996 .object = &uartCC26XXObjects[CC1352P1_LAUNCHXL_UART1],
997 .hwAttrs = &uartCC26XXHWAttrs[CC1352P1_LAUNCHXL_UART1]
1002const uint_least8_t UART_count = CC1352P1_LAUNCHXL_UARTCOUNT;
1009#include <ti/drivers/dma/UDMACC26XX.h>
1011UDMACC26XX_Object udmaObjects[CC1352P1_LAUNCHXL_UDMACOUNT];
1013const UDMACC26XX_HWAttrs udmaHWAttrs[CC1352P1_LAUNCHXL_UDMACOUNT] = {
1015 .baseAddr = UDMA0_BASE,
1016 .powerMngrId = PowerCC26XX_PERIPH_UDMA,
1017 .intNum = INT_DMA_ERR,
1022const UDMACC26XX_Config UDMACC26XX_config[CC1352P1_LAUNCHXL_UDMACOUNT] = {
1024 .object = &udmaObjects[CC1352P1_LAUNCHXL_UDMA0],
1025 .hwAttrs = &udmaHWAttrs[CC1352P1_LAUNCHXL_UDMA0]
1034#include <ti/drivers/Watchdog.h>
1035#include <ti/drivers/watchdog/WatchdogCC26XX.h>
1037WatchdogCC26XX_Object watchdogCC26XXObjects[CC1352P1_LAUNCHXL_WATCHDOGCOUNT];
1039const WatchdogCC26XX_HWAttrs watchdogCC26XXHWAttrs[CC1352P1_LAUNCHXL_WATCHDOGCOUNT] = {
1041 .baseAddr = WDT_BASE,
1046const Watchdog_Config Watchdog_config[CC1352P1_LAUNCHXL_WATCHDOGCOUNT] = {
1048 .fxnTablePtr = &WatchdogCC26XX_fxnTable,
1049 .object = &watchdogCC26XXObjects[CC1352P1_LAUNCHXL_WATCHDOG0],
1050 .hwAttrs = &watchdogCC26XXHWAttrs[CC1352P1_LAUNCHXL_WATCHDOG0]
1054const uint_least8_t Watchdog_count = CC1352P1_LAUNCHXL_WATCHDOGCOUNT;
1060extern void Board_initHook(
void);
1069 if (PIN_init(BoardGpioInitTable) != PIN_SUCCESS) {
1081void Board_init(
void)
===========================================================================
void CC1352P1_LAUNCHXL_initGeneral(void)
Initialize the general board specific settings.
Header file for the CC13xx/CC26xx clock implementation.
void clock_arch_standby_policy(void)
Called by the Power driver when dropping to some low-power state.
#define SSI1_BASE
Base address for SSI1.
#define SSI0_BASE
Base address for SSI0.