40#ifndef CC13XX_CC26XX_DEF_H_
41#define CC13XX_CC26XX_DEF_H_
43#include <ti/devices/DeviceFamily.h>
45#if (DeviceFamily_PARENT == DeviceFamily_PARENT_CC13X0_CC26X0)
47#elif (DeviceFamily_PARENT == DeviceFamily_PARENT_CC13X2_CC26X2)
54#define RTIMER_ARCH_SECOND 65536
56#define INT_MASTER_CONF_STATUS_DATATYPE uintptr_t
61#define CC13XX_RADIO_PHY_OVERHEAD 6
63#define CC13XX_RADIO_PHY_HEADER_LEN 6
65#define CC13XX_RADIO_BIT_RATE 50000
68#define CC26XX_RADIO_PHY_OVERHEAD 3
70#define CC26XX_RADIO_PHY_HEADER_LEN 5
72#define CC26XX_RADIO_BIT_RATE 250000
74#if defined(DEVICE_LINE_CC13XX)
75#define RADIO_PHY_HEADER_LEN CC13XX_RADIO_PHY_HEADER_LEN
76#define RADIO_PHY_OVERHEAD CC13XX_RADIO_PHY_OVERHEAD
77#define RADIO_BIT_RATE CC13XX_RADIO_BIT_RATE
80#ifndef TSCH_CONF_DEFAULT_TIMESLOT_TIMING
81#define TSCH_CONF_DEFAULT_TIMESLOT_TIMING tsch_timing_cc13xx_50kbps
85#define TSCH_CONF_ARCH_HDR_PATH "rf/cc13xx-50kbps-tsch.h"
88#define RADIO_PHY_HEADER_LEN CC26XX_RADIO_PHY_HEADER_LEN
89#define RADIO_PHY_OVERHEAD CC26XX_RADIO_PHY_OVERHEAD
90#define RADIO_BIT_RATE CC26XX_RADIO_BIT_RATE
93#define RADIO_BYTE_AIR_TIME (1000000 / (RADIO_BIT_RATE / 8))
95#define RADIO_FRAME_DURATION(payload_len) \
96 US_TO_RTIMERTICKS(RADIO_BYTE_AIR_TIME * (RADIO_PHY_OVERHEAD + (payload_len)))
99#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(RADIO_PHY_HEADER_LEN * RADIO_BYTE_AIR_TIME))
102#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(15))
104#define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(352))
107#define RAT_SECOND 4000000u
108#define RAT_TO_RTIMER(x) ((uint32_t)(((uint64_t)(x) * (RTIMER_SECOND / 256)) / (RAT_SECOND / 256)))
109#define USEC_TO_RAT(x) ((x) * 4)
111#if (RTIMER_SECOND % 256) || (RAT_SECOND % 256)
112#error RAT_TO_RTIMER macro must be fixed!
116#define TSCH_CONF_RADIO_ON_DURING_TIMESLOT 1
119#define TSCH_CONF_HW_FRAME_FILTERING 0
122#ifndef TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS
123#define TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS 1
124#define TSCH_CONF_TIMESYNC_REMOVE_JITTER 0
127#ifndef TSCH_CONF_BASE_DRIFT_PPM
128#if defined(DEVICE_LINE_CC13XX)
138#define TSCH_CONF_BASE_DRIFT_PPM -214
150#define TSCH_CONF_BASE_DRIFT_PPM -977
155#ifndef TSCH_CONF_CHANNEL_SCAN_DURATION
156#define TSCH_CONF_CHANNEL_SCAN_DURATION (CLOCK_SECOND / 10)
160#ifndef TSCH_CONF_ASSOCIATION_POLL_FREQUENCY
161#define TSCH_CONF_ASSOCIATION_POLL_FREQUENCY 10
166#ifndef TSCH_CONF_RX_WAIT
167#define TSCH_CONF_RX_WAIT 3000
171#if (DeviceFamily_PARENT == DeviceFamily_PARENT_CC13X0_CC26X0)
172#define CMSIS_CONF_HEADER_PATH "cc13x0-cc26x0-cm3.h"
173#elif (DeviceFamily_PARENT == DeviceFamily_PARENT_CC13X2_CC26X2)
174#define CMSIS_CONF_HEADER_PATH "cc13x2-cc26x2-cm4.h"
178#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h"
179#define ATOMIC_CONF_ARCH_HEADER_PATH "atomic-cortex.h"
180#define MEMORY_BARRIER_CONF_ARCH_HEADER_PATH "memory-barrier-cortex.h"
183#define GPIO_HAL_CONF_ARCH_HDR_PATH "dev/gpio-hal-arch.h"
184#define GPIO_HAL_CONF_ARCH_SW_TOGGLE 0
185#define GPIO_HAL_CONF_PORT_PIN_NUMBERING 0
Compiler and data type definitions for all CM3-based CPUs.
Compiler and data type definitions for all CM4-based CPUs.