Topics
	CC2538 Built-In Sensors


	CC2538 Cortex-M3


	CC2538 GPIO HAL implementation


	CC2538 PWM driver


	CC2538 master interrupt manipulation


	cc2538 ADC


	cc2538 ADC and RNG


	cc2538 AES/SHA cryptoprocessor


	cc2538 CPU


	cc2538 Clock


	cc2538 Coffee port module


	cc2538 General-Purpose I/O


	cc2538 General-Purpose Timers


	cc2538 I/O Control


	cc2538 I2C Control


	cc2538 IEEE Address Control


	cc2538 Low Power Modes


	cc2538 Nested Vectored Interrupt Controller


	cc2538 PKA engine


	cc2538 RF Core


	cc2538 RF Driver


	cc2538 ROM utility function library


	cc2538 Random Number Generator


	cc2538 Register Manipulation


	cc2538 Sleep Timer and Watchdog


	cc2538 SoC


	cc2538 Synchronous Serial Interface


	cc2538 System Control (SysCtrl)


	cc2538 UART


	cc2538 USB controller


	cc2538 family of devices


	cc2538 flash memory


	cc2538 micro-DMA


	cc2538 rtimer


	cc2538 watchdog timer driver

Files
file	startup-gcc.c
	Startup code for the cc2538 chip, to be used when building with gcc.

Functions
void	clock_isr (void)
	The clock Interrupt Service Routine.

void	rtimer_isr (void)
	The rtimer ISR.

void	cc2538_rf_rx_tx_isr (void)
	The cc2538 RF RX/TX ISR.

void	cc2538_rf_err_isr (void)
	The cc2538 RF Error ISR.

void	crypto_isr (void)
	The AES/SHA cryptoprocessor ISR.

void	pka_isr (void)
	The PKA engine ISR.

CC2538 System Control configuration
#define	SYS_CTRL_CONF_OSC32K_USE_XTAL 0
	Use the on-board 32.768-kHz crystal.

Watchdog Timer configuration
#define	WATCHDOG_CONF_ENABLE 1
	Enable the watchdog timer.

USB 'core' configuration
Those values are not meant to be modified by the user, except where stated otherwise
#define	USB_ARCH_CONF_DMA 1
	Change to Enable/Disable USB DMA.

uDMA Configuration and channel allocations
#define	USB_ARCH_CONF_RX_DMA_CHAN 0
	USB -> RAM DMA channel.

#define	USB_ARCH_CONF_TX_DMA_CHAN 1
	RAM -> USB DMA channel.

#define	CC2538_RF_CONF_TX_DMA_CHAN 2
	RF -> RAM DMA channel.

#define	CC2538_RF_CONF_RX_DMA_CHAN 3
	RAM -> RF DMA channel.

Character I/O Configuration
#define	UART_CONF_ENABLE 1
	Enable/Disable UART I/O.

#define	UART0_CONF_BAUD_RATE 115200
	Default UART0 baud rate.

#define	UART1_CONF_BAUD_RATE 115200
	Default UART1 baud rate.

#define	SLIP_ARCH_CONF_USB 0
	SLIP over UART by default.

#define	DBG_CONF_USB 0
	All debugging over UART by default.

#define	SERIAL_LINE_CONF_UART 0
	UART to use with serial line.

#define	SLIP_ARCH_CONF_UART 0
	UART to use with SLIP.

#define	DBG_CONF_UART 0
	UART to use for debugging.

#define	UART1_CONF_UART 0
	UART to use for examples relying on the uart1_* API.

#define	CC2538_CONF_QUIET 0
	Define this as 1 to build a headless node.

#define	USB_SERIAL_CONF_ENABLE
	Enable the USB core only if we need it.

RF configuration
#define	CC2538_RF_CONF_AUTOACK 1
	RF H/W generates ACKs.

#define	CC2538_RF_CONF_TX_USE_DMA 1
	RF TX over DMA.

#define	CC2538_RF_CONF_RX_USE_DMA 1
	RF RX over DMA.

LPM configuration
#define	LPM_CONF_ENABLE 1
	Set to 0 to disable LPM entirely.

#define	LPM_CONF_MAX_PM 1
	Maximum PM.

#define	LPM_CONF_STATS 0
	Set to 1 to enable LPM-related stats.

IEEE address configuration
Used to generate our link-layer & IPv6 address
#define	IEEE_ADDR_CONF_HARDCODED 0
	Location of the IEEE address 0 => Read from InfoPage, 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS.

#define	IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
	The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED is defined as 1.

#define	IEEE_ADDR_CONF_USE_SECONDARY_LOCATION 0
	Location of the IEEE address in the InfoPage when IEEE_ADDR_CONF_HARDCODED is defined as 0 0 => Use the primary address location 1 => Use the secondary address location.

Security
#define	CRYPTO_CONF_INIT 1
	Whether to init cryptoprocessor.

#define	AES_128_CONF cc2538_aes_128_driver
	AES-128 driver.

#define	CCM_STAR_CONF cc2538_ccm_star_driver
	AES-CCM* driver.

#define	SHA_256_CONF cc2538_sha_256_driver
	SHA-256 driver.

Detailed Description

CPU-Specific functionality - available to all cc2538-based platforms

Macro Definition Documentation

◆ CC2538_CONF_QUIET

#define CC2538_CONF_QUIET 0

Define this as 1 to build a headless node.

The UART will not be initialised its clock will be gated, offering some energy savings. The USB will not be initialised either

Definition at line 164 of file cc2538-conf.h.

◆ LPM_CONF_MAX_PM

#define LPM_CONF_MAX_PM 1

Maximum PM.

The SoC will never drop to a Power Mode deeper than the one specified here. 0 for PM0, 1 for PM1 and 2 for PM2

Definition at line 250 of file cc2538-conf.h.

Function Documentation

◆ cc2538_rf_err_isr()

void cc2538_rf_err_isr ( void )

The cc2538 RF Error ISR.

   This is the interrupt service routine for all RF errors. We
   acknowledge every error type and instead of trying to be smart and
   act differently depending on error condition, we simply reset the
   transceiver. RX FIFO overflow is an exception, we ignore this error
   since read() handles it anyway.

   However, we don't want to reset within this ISR. If the error occurs
   while we are reading a frame out of the FIFO, trashing the FIFO in
   the middle of read(), would result in further errors (RX underflows).

   Instead, we set a flag and poll the driver process. The process will
   reset the transceiver without any undesirable consequences.

Definition at line 1228 of file cc2538-rf.c.

References process_poll(), RFCORE_SFR_RFERRF, and RFCORE_SFR_RFERRF_RXOVERF.

◆ cc2538_rf_rx_tx_isr()

void cc2538_rf_rx_tx_isr ( void )

The cc2538 RF RX/TX ISR.

   This is the interrupt service routine for all RF interrupts relating
   to RX and TX. Error conditions are handled by cc2538_rf_err_isr().
   Currently, we only acknowledge the FIFOP interrupt source.

Definition at line 1201 of file cc2538-rf.c.

References process_poll(), and RFCORE_SFR_RFIRQF0.

◆ clock_isr()

void clock_isr ( void )

The clock Interrupt Service Routine.

It polls the etimer process if an etimer has expired. It also updates the software clock tick and seconds counter.

Definition at line 242 of file clock.c.

References update_ticks().

◆ crypto_isr()

void crypto_isr ( void )

The AES/SHA cryptoprocessor ISR.

  This is the interrupt service routine for the AES/SHA
  cryptoprocessor.

  This ISR is called at worst from PM0, so lpm_exit() does not need
  to be called.

Definition at line 59 of file crypto.c.

References AES_IRQn, and process_poll().

◆ pka_isr()

void pka_isr ( void )

The PKA engine ISR.

  This is the interrupt service routine for the PKA engine.

  This ISR is called at worst from PM0, so lpm_exit() does not need
  to be called.

Definition at line 62 of file pka.c.

References PKA_IRQn, and process_poll().

◆ rtimer_isr()

void rtimer_isr ( void )

The rtimer ISR.

   Interrupts are only turned on when we have an rtimer task to schedule
   Once the interrupt fires, the task is called and then interrupts no
   longer get acknowledged until the next task needs scheduled.

Definition at line 130 of file rtimer-arch.c.

References rtimer_run_next(), and SMT_IRQn.

Topics

Files

Functions

CC2538 System Control configuration

Watchdog Timer configuration

USB 'core' configuration

uDMA Configuration and channel allocations

Character I/O Configuration

RF configuration

LPM configuration

IEEE address configuration

Security