90 nrfx_gpiote_in_config_t gpiote_config = {
95 uint32_t pin_number = NRF_GPIO_PIN_MAP(port, pin);
97 tmp = cfg & GPIO_HAL_PIN_CFG_EDGE_BOTH;
98 if(tmp == GPIO_HAL_PIN_CFG_EDGE_NONE) {
99 gpiote_config.sense = GPIOTE_CONFIG_POLARITY_None;
100 }
else if(tmp == GPIO_HAL_PIN_CFG_EDGE_RISING) {
101 gpiote_config.sense = NRF_GPIOTE_POLARITY_LOTOHI;
102 }
else if(tmp == GPIO_HAL_PIN_CFG_EDGE_FALLING) {
103 gpiote_config.sense = NRF_GPIOTE_POLARITY_HITOLO;
104 }
else if(tmp == GPIO_HAL_PIN_CFG_EDGE_BOTH) {
105 gpiote_config.sense = NRF_GPIOTE_POLARITY_TOGGLE;
108 tmp = cfg & GPIO_HAL_PIN_CFG_PULL_MASK;
109 if(tmp == GPIO_HAL_PIN_CFG_PULL_NONE) {
110 gpiote_config.pull = NRF_GPIO_PIN_NOPULL;
111 }
else if(tmp == GPIO_HAL_PIN_CFG_PULL_DOWN) {
112 gpiote_config.pull = NRF_GPIO_PIN_PULLDOWN;
113 }
else if(tmp == GPIO_HAL_PIN_CFG_PULL_UP) {
114 gpiote_config.pull = NRF_GPIO_PIN_PULLUP;
119 tmp = cfg & GPIO_HAL_PIN_CFG_INT_MASK;
120 if(tmp == GPIO_HAL_PIN_CFG_INT_DISABLE) {
121 nrfx_gpiote_in_event_disable(pin_number);
122 }
else if(tmp == GPIO_HAL_PIN_CFG_INT_ENABLE) {
123 nrfx_gpiote_in_event_enable(pin_number,
true);
133 GPIO_HAL_PIN_CFG_EDGE_NONE |
134 GPIO_HAL_PIN_CFG_INT_DISABLE;
135 nrf_gpio_pin_pull_t pull;
136 nrf_gpiote_polarity_t polarity;
138 pin_number = NRF_GPIO_PIN_MAP(port, pin);
141 if(nrf_gpio_pin_dir_get(pin_number) == NRF_GPIO_PIN_DIR_OUTPUT) {
150 for(i = 0; i < GPIOTE_CH_NUM; i++) {
151 if(nrf_gpiote_event_pin_get(NRF_GPIOTE, i) == pin_number) {
152 polarity = nrf_gpiote_event_polarity_get(NRF_GPIOTE, i);
154 if(polarity == NRF_GPIOTE_POLARITY_LOTOHI) {
155 cfg |= GPIO_HAL_PIN_CFG_EDGE_BOTH;
156 }
else if(polarity == NRF_GPIOTE_POLARITY_HITOLO) {
157 cfg |= GPIO_HAL_PIN_CFG_EDGE_BOTH;
158 }
else if(polarity == NRF_GPIOTE_POLARITY_TOGGLE) {
159 cfg |= GPIO_HAL_PIN_CFG_EDGE_BOTH;
162 pull = nrf_gpio_pin_pull_get(pin_number);
164 if(pull == NRF_GPIO_PIN_PULLDOWN) {
165 cfg |= GPIO_HAL_PIN_CFG_PULL_DOWN;
166 }
else if(pull == NRF_GPIO_PIN_PULLUP) {
167 cfg |= GPIO_HAL_PIN_CFG_PULL_UP;
170 if(nrf_gpiote_int_enable_check(NRF_GPIOTE, 1 << i)) {
171 cfg |= GPIO_HAL_PIN_CFG_INT_ENABLE;