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cc13xx-cc26xx-def.h
1/*
2 * Copyright (c) 2017, George Oikonomou - http://www.spd.gr
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. Neither the name of the copyright holder nor the names of its
15 * contributors may be used to endorse or promote products derived
16 * from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
29 * OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31/*---------------------------------------------------------------------------*/
32#ifndef CC13XX_CC26XX_DEF_H_
33#define CC13XX_CC26XX_DEF_H_
34/*---------------------------------------------------------------------------*/
35#include "cm3/cm3-def.h"
36/*---------------------------------------------------------------------------*/
37/* TSCH related defines */
38
39/* 2 bytes header, 4 bytes CRC */
40#define CC13XX_RADIO_PHY_OVERHEAD 6
41/* 3 bytes preamble, 3 bytes sync */
42#define CC13XX_RADIO_PHY_HEADER_LEN 6
43/* The default data rate is 50 kbps */
44#define CC13XX_RADIO_BIT_RATE 50000
45
46/* 1 len byte, 2 bytes CRC */
47#define CC26XX_RADIO_PHY_OVERHEAD 3
48/* 4 bytes preamble, 1 byte sync */
49#define CC26XX_RADIO_PHY_HEADER_LEN 5
50/* The fixed data rate is 250 kbps */
51#define CC26XX_RADIO_BIT_RATE 250000
52
53#if CPU_FAMILY_CC13XX
54#define RADIO_PHY_HEADER_LEN CC13XX_RADIO_PHY_HEADER_LEN
55#define RADIO_PHY_OVERHEAD CC13XX_RADIO_PHY_OVERHEAD
56#define RADIO_BIT_RATE CC13XX_RADIO_BIT_RATE
57
58/* The TSCH default slot length of 10ms is too short, use custom one instead */
59#ifndef TSCH_CONF_DEFAULT_TIMESLOT_TIMING
60#define TSCH_CONF_DEFAULT_TIMESLOT_TIMING tsch_timing_cc13xx_50kbps
61#endif /* TSCH_CONF_DEFAULT_TIMESLOT_TIMING */
62
63/* Symbol for the custom TSCH timeslot timing template */
64#define TSCH_CONF_ARCH_HDR_PATH "rf-core/cc13xx-50kbps-tsch.h"
65
66#else
67#define RADIO_PHY_HEADER_LEN CC26XX_RADIO_PHY_HEADER_LEN
68#define RADIO_PHY_OVERHEAD CC26XX_RADIO_PHY_OVERHEAD
69#define RADIO_BIT_RATE CC26XX_RADIO_BIT_RATE
70#endif
71
72#define RADIO_BYTE_AIR_TIME (1000000 / (RADIO_BIT_RATE / 8))
73
74#define RADIO_FRAME_DURATION(payload_len) \
75 US_TO_RTIMERTICKS(RADIO_BYTE_AIR_TIME * (RADIO_PHY_OVERHEAD + (payload_len)))
76
77/* Delay between GO signal and SFD */
78#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(RADIO_PHY_HEADER_LEN * RADIO_BYTE_AIR_TIME))
79/* Delay between GO signal and start listening.
80 * This value is so small because the radio is constantly on within each timeslot. */
81#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(15))
82/* Delay between the SFD finishes arriving and it is detected in software. */
83#define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(352))
84
85/* Timer conversion; radio is running at 4 MHz */
86#define RADIO_TIMER_SECOND 4000000u
87#if (RTIMER_SECOND % 256) || (RADIO_TIMER_SECOND % 256)
88#error RADIO_TO_RTIMER macro must be fixed!
89#endif
90#define RADIO_TO_RTIMER(X) ((uint32_t)(((uint64_t)(X) * (RTIMER_SECOND / 256)) / (RADIO_TIMER_SECOND / 256)))
91#define USEC_TO_RADIO(X) ((X) * 4)
92
93/* Do not turn off TSCH within a timeslot: not enough time */
94#define TSCH_CONF_RADIO_ON_DURING_TIMESLOT 1
95
96/* Disable TSCH frame filtering */
97#define TSCH_CONF_HW_FRAME_FILTERING 0
98
99/* Use hardware timestamps */
100#ifndef TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS
101#define TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS 1
102#define TSCH_CONF_TIMESYNC_REMOVE_JITTER 0
103#endif
104
105#ifndef TSCH_CONF_BASE_DRIFT_PPM
106#if CPU_FAMILY_CC13XX
107/* The drift compared to "true" 40ms slots.
108 * Enable adaptive sync to enable compensation for this.
109 * Slot length 40000 usec
110 * 1311 ticks
111 * Tick duration 30.517578125 usec
112 * Real slot duration 40008.544922 usec
113 * Target - real duration = -8.544922 usec
114 * PPM -8.544922 / 40000 = -0.000214
115 */
116#define TSCH_CONF_BASE_DRIFT_PPM -214
117#else /* CPU_FAMILY_CC13XX */
118/* The drift compared to "true" 10ms slots.
119 * Enable adaptive sync to enable compensation for this.
120 * Slot length 10000 usec
121 * 328 ticks
122 * Tick duration 30.517578125 usec
123 * Real slot duration 10009.765625 usec
124 * Target - real duration = -9.765625 usec
125 * TSCH_CONF_BASE_DRIFT_PPM -977
126 */
127#define TSCH_CONF_BASE_DRIFT_PPM -977
128#endif /* CPU_FAMILY_CC13XX */
129#endif /* TSCH_CONF_BASE_DRIFT_PPM */
130
131/* 10 times per second */
132#ifndef TSCH_CONF_CHANNEL_SCAN_DURATION
133#define TSCH_CONF_CHANNEL_SCAN_DURATION (CLOCK_SECOND / 10)
134#endif
135
136/* Increase this from the default 100 to improve TSCH association speed on this platform */
137#ifndef TSCH_CONF_ASSOCIATION_POLL_FREQUENCY
138#define TSCH_CONF_ASSOCIATION_POLL_FREQUENCY 1000
139#endif
140
141/* Slightly reduce the TSCH guard time (from 2200 usec to 1800 usec) to make sure
142 * the CC26xx radio has sufficient time to start up. */
143#ifndef TSCH_CONF_RX_WAIT
144#define TSCH_CONF_RX_WAIT 1800
145#endif
146/*---------------------------------------------------------------------------*/
147#define RTIMER_ARCH_SECOND 65536
148/*---------------------------------------------------------------------------*/
149/* Path to CMSIS header */
150#define CMSIS_CONF_HEADER_PATH "cc13x0-cc26x0-cm3.h"
151
152/* Path to headers with implementation of mutexes, atomic and memory barriers */
153#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h"
154#define ATOMIC_CONF_ARCH_HEADER_PATH "atomic-cortex.h"
155#define MEMORY_BARRIER_CONF_ARCH_HEADER_PATH "memory-barrier-cortex.h"
156/*---------------------------------------------------------------------------*/
157#define GPIO_HAL_CONF_ARCH_HDR_PATH "dev/gpio-hal-arch.h"
158#define GPIO_HAL_CONF_ARCH_SW_TOGGLE 0
159#define GPIO_HAL_CONF_PORT_PIN_NUMBERING 0
160/*---------------------------------------------------------------------------*/
161#define SPI_CONF_CONTROLLER_COUNT 2
162/*---------------------------------------------------------------------------*/
163#endif /* CC13XX_CC26XX_DEF_H_ */
164/*---------------------------------------------------------------------------*/
cm3-def.h
Compiler and data type definitions for all CM3-based CPUs.