CMSIS Cortex-M3 core peripheral access layer header file for CC2538. More...

#include <core_cm3.h>

Macros
Processor and Core Peripheral Section
#define	__CM3_REV 0x0200
	Core Revision r2p0.

#define	__MPU_PRESENT 1
	MPU present or not.

#define	__NVIC_PRIO_BITS 3
	Number of Bits used for Priority Levels.

#define	__Vendor_SysTickConfig 0
	Set to 1 if different SysTick Config is used.

Interrupt Number Definition
enum	IRQn { NonMaskableInt_IRQn = -14 , HardFault_IRQn = -13 , MemoryManagement_IRQn = -12 , BusFault_IRQn = -11 , UsageFault_IRQn = -10 , SVCall_IRQn = -5 , DebugMonitor_IRQn = -4 , PendSV_IRQn = -2 , SysTick_IRQn = -1 , GPIO_A_IRQn = 0 , GPIO_B_IRQn = 1 , GPIO_C_IRQn = 2 , GPIO_D_IRQn = 3 , UART0_IRQn = 5 , UART1_IRQn = 6 , SSI0_IRQn = 7 , I2C_IRQn = 8 , ADC_IRQn = 14 , WDT_IRQn = 18 , GPT0A_IRQn = 19 , GPT0B_IRQn = 20 , GPT1A_IRQn = 21 , GPT1B_IRQn = 22 , GPT2A_IRQn = 23 , GPT2B_IRQn = 24 , ADC_CMP_IRQn = 25 , RF_TX_RX_ALT_IRQn = 26 , RF_ERR_ALT_IRQn = 27 , SYS_CTRL_IRQn = 28 , FLASH_CTRL_IRQn = 29 , AES_ALT_IRQn = 30 , PKA_ALT_IRQn = 31 , SMT_ALT_IRQn = 32 , MACT_ALT_IRQn = 33 , SSI1_IRQn = 34 , GPT3A_IRQn = 35 , GPT3B_IRQn = 36 , UDMA_SW_IRQn = 46 , UDMA_ERR_IRQn = 47 , USB_IRQn = 140 , RF_TX_RX_IRQn = 141 , RF_ERR_IRQn = 142 , AES_IRQn = 143 , PKA_IRQn = 144 , SMT_IRQn = 145 , MACT_IRQn = 146 }

Detailed Description

CMSIS Cortex-M3 core peripheral access layer header file for CC2538.

Definition in file cc2538_cm3.h.

Macros