35#include "dev/radio/cc1200/cc1200-const.h"
36#include "dev/radio/cc1200/cc1200-conf.h"
37#include "dev/radio/cc1200/cc1200-arch.h"
38#include "dev/radio/cc1200/cc1200-rf-cfg.h"
42#include "dev/watchdog.h"
51static rtimer_clock_t sfd_timestamp = 0;
71#ifndef CC1200_RF_TESTMODE
72#define CC1200_RF_TESTMODE 0
77#if CC1200_RF_TESTMODE == 1
78#define CC1200_RF_CFG cc1200_802154g_863_870_fsk_50kbps
79#elif CC1200_RF_TESTMODE == 2
80#define CC1200_RF_CFG cc1200_802154g_863_870_fsk_50kbps
81#elif CC1200_RF_TESTMODE == 3
82#define CC1200_RF_CFG cc1200_802154g_863_870_fsk_50kbps
92#define CC1200_WITH_TX_BUF (!MAC_CONF_WITH_TSCH)
100#define STATE_USES_MARC_STATE 0
107#if MAC_CONF_WITH_TSCH
123#define APPENDIX_LEN 2
129#if CC1200_MAX_PAYLOAD_LEN > (2048 - PHR_LEN)
130#error Payload length not supported by this driver
133#if CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN)
135#error Payload length not supported without GPIO2
139#if CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN)
141#error Payload length not supported without enabling 802.15.4g mode
149#define GPIO2_IOCFG CC1200_IOCFG_RXFIFO_THR
151#if MAC_CONF_WITH_TSCH
153#define FIFO_THRESHOLD 1
155#define FIFO_THRESHOLD 0
158#define FIFO_THRESHOLD 32
161#define RXOFF_MODE_RX 1
163#define APPEND_STATUS 1
166#define GPIO2_IOCFG CC1200_IOCFG_MARC_2PIN_STATUS_0
167#if (CC1200_MAX_PAYLOAD_LEN <= (CC1200_FIFO_SIZE - PHR_LEN - APPENDIX_LEN))
172#define RXOFF_MODE_RX 1
174#define APPEND_STATUS 1
180#define RXOFF_MODE_RX 0
182#define APPEND_STATUS 0
187#define GPIO0_IOCFG CC1200_IOCFG_PKT_SYNC_RXTX
189#define GPIO3_IOCFG CC1200_IOCFG_MARC_2PIN_STATUS_0
191#define TXOFF_MODE_RX 1
194#define CC_APPENDIX_LEN 2
197#define CC_APPENDIX_LEN 0
203extern const cc1200_rf_cfg_t CC1200_RF_CFG;
208#define XTAL_FREQ_KHZ 40000
215#if (XTAL_FREQ_KHZ == 40000) && (LO_DIVIDER == 4)
216#define FREQ_DIVIDER 625
217#define FREQ_MULTIPLIER 4096
219#error Invalid settings for frequency calculation
222#if STATE_USES_MARC_STATE
224#define STATE_IDLE CC1200_MARC_STATE_IDLE
225#define STATE_RX CC1200_MARC_STATE_RX
226#define STATE_TX CC1200_MARC_STATE_TX
227#define STATE_RX_FIFO_ERROR CC1200_MARC_STATE_RX_FIFO_ERR
228#define STATE_TX_FIFO_ERROR CC1200_MARC_STATE_TX_FIFO_ERR
231#define STATE_IDLE CC1200_STATUS_BYTE_IDLE
232#define STATE_RX CC1200_STATUS_BYTE_RX
233#define STATE_TX CC1200_STATUS_BYTE_TX
234#define STATE_FSTXON CC1200_STATUS_BYTE_FSTXON
235#define STATE_CALIBRATE CC1200_STATUS_BYTE_CALIBRATE
236#define STATE_SETTLING CC1200_STATUS_BYTE_SETTLING
237#define STATE_RX_FIFO_ERR CC1200_STATUS_BYTE_RX_FIFO_ERR
238#define STATE_TX_FIFO_ERR CC1200_STATUS_BYTE_TX_FIFO_ERR
244#define INVALID_FRAME 0
246#define ADDR_CHECK_FAILED 1
248#define ADDR_CHECK_OK 2
250#define ADDR_CHECK_OK_ACK_SEND 3
255#define CHANNEL_UPDATE_SUCCEEDED 0
257#define CHANNEL_UPDATE_POSTPONED 1
259#define CHANNEL_OUT_OF_LIMITS 2
264#define RF_INITIALIZED 0x01
268#define RF_RX_PROCESSING_PKT 0x04
270#define RF_TX_ACTIVE 0x08
272#define RF_UPDATE_CHANNEL 0x10
274#define RF_POLL_RX_INTERRUPT 0x20
276#define RF_RX_ONGOING 0x40
279#if CC1200_CAL_TIMEOUT_SECONDS
280#define RF_FORCE_CALIBRATION 0x40
290#define TX_LEDS_ON() leds_on(CC1200_TX_LEDS)
291#define TX_LEDS_OFF() leds_off(CC1200_TX_LEDS)
298#define RX_LEDS_ON() leds_on(CC1200_RX_LEDS)
299#define RX_LEDS_OFF() leds_off(CC1200_RX_LEDS)
310#define LOCK_SPI() do { spi_locked++; } while(0)
311#define SPI_IS_LOCKED() (spi_locked != 0)
312#define RELEASE_SPI() do { spi_locked--; } while(0)
317#define SETUP_GPIO_INTERRUPTS() \
319 cc1200_arch_gpio0_setup_irq(0); \
320 cc1200_arch_gpio2_setup_irq(1); \
322#define ENABLE_GPIO_INTERRUPTS() \
324 cc1200_arch_gpio0_enable_irq(); \
325 cc1200_arch_gpio2_enable_irq(); \
327#define DISABLE_GPIO_INTERRUPTS() \
329 cc1200_arch_gpio0_disable_irq(); \
330 cc1200_arch_gpio2_disable_irq(); \
333#define SETUP_GPIO_INTERRUPTS() cc1200_arch_gpio0_setup_irq(0)
334#define ENABLE_GPIO_INTERRUPTS() cc1200_arch_gpio0_enable_irq()
335#define DISABLE_GPIO_INTERRUPTS() cc1200_arch_gpio0_disable_irq()
342#define ERROR(...) printf(__VA_ARGS__)
349#define RF_ASSERT(condition) \
352 printf("RF: Assertion failed in line %d\n", __LINE__); \
356#define RF_ASSERT(condition)
361#define WARNING(...) printf(__VA_ARGS__)
368#define INFO(...) printf(__VA_ARGS__)
374#define RTIMER_BUSYWAIT_UNTIL_STATE(s, t) RTIMER_BUSYWAIT_UNTIL(state() == (s), t)
380static volatile uint8_t spi_locked = 0;
381#if CC1200_WITH_TX_BUF
383static uint8_t tx_pkt[CC1200_MAX_PAYLOAD_LEN];
386static uint16_t tx_pkt_len;
388uint16_t bytes_left_to_write;
390static uint8_t rx_pkt[CC1200_MAX_PAYLOAD_LEN + APPENDIX_LEN];
392static volatile uint16_t rx_pkt_len = 0;
397static uint8_t rf_channel;
399static uint8_t new_rf_channel;
405static int8_t txpower;
406static int8_t new_txpower;
408static int8_t cca_threshold;
409static int8_t new_cca_threshold;
411static uint8_t rf_flags = 0;
412#if !CC1200_AUTOCAL && CC1200_CAL_TIMEOUT_SECONDS
414static unsigned long cal_timer;
416#if CC1200_USE_RX_WATCHDOG
428copy_header_to_tx_fifo(
unsigned short payload_len);
431prepare(
const void *payload,
unsigned short payload_len);
434transmit(
unsigned short payload_len);
437send(
const void *payload,
unsigned short payload_len);
440read(
void *buf,
unsigned short bufsize);
449receiving_packet(
void);
467get_object(radio_param_t param,
void *dest,
size_t size);
470set_object(radio_param_t param,
const void *src,
size_t size);
497strobe(uint8_t strobe);
503single_write(uint16_t
addr, uint8_t value);
506single_read(uint16_t
addr);
509burst_write(uint16_t
addr,
const uint8_t *data, uint8_t data_len);
512burst_read(uint16_t
addr, uint8_t *data, uint8_t data_len);
515write_reg_settings(
const registerSetting_t *reg_settings,
516 uint16_t sizeof_reg_settings);
533idle_calibrate_rx(
void);
539idle_tx_rx(
const uint8_t *payload, uint16_t payload_len);
542update_txpower(int8_t txpower_dbm);
545update_cca_threshold(int8_t threshold_dbm);
548calculate_freq(uint8_t channel);
554addr_check_auto_ack(uint8_t *frame, uint16_t frame_len);
557static void pollhandler(
void);
559PROCESS(cc1200_process,
"CC1200 driver");
568#if CC1200_USE_RX_WATCHDOG
571 if((rf_flags & (RF_ON | RF_TX_ACTIVE)) == RF_ON) {
585 if(cc1200_arch_gpio0_read_pin() == 0) {
595 if(state() != STATE_RX) {
596 WARNING(
"RF: RX watchdog triggered!\n");
621 if((rf_flags & (RF_ON + RF_POLL_RX_INTERRUPT)) ==
622 (RF_ON + RF_POLL_RX_INTERRUPT)) {
623 cc1200_rx_interrupt();
626 if(rf_flags & RF_UPDATE_CHANNEL) {
646 NETSTACK_MAC.
input();
665 INFO(
"RF: Init (%s)\n", CC1200_RF_CFG.cfg_descriptor);
667 if(!(rf_flags & RF_INITIALIZED)) {
675 SETUP_GPIO_INTERRUPTS();
687 new_txpower = CC1200_RF_CFG.max_txpower;
688 update_txpower(new_txpower);
691 new_cca_threshold = CC1200_RF_CFG.cca_threshold;
692 update_cca_threshold(new_cca_threshold);
697 rf_flags |= (RF_INITIALIZED + RF_ON);
717prepare(
const void *payload,
unsigned short payload_len)
720 INFO(
"RF: Prepare (%d)\n", payload_len);
722 if((payload_len < ACK_LEN) ||
723 (payload_len > CC1200_MAX_PAYLOAD_LEN)) {
724 ERROR(
"RF: Invalid payload length!\n");
728 tx_pkt_len = payload_len;
730#if CC1200_WITH_TX_BUF
732 memcpy(tx_pkt, payload, tx_pkt_len);
734#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
735#error CC1200 max payload too large
738 copy_header_to_tx_fifo(payload_len);
739 burst_write(CC1200_TXFIFO, payload, payload_len);
748copy_header_to_tx_fifo(
unsigned short payload_len)
756#if CC1200_802154G_CRC16
762 phr.phrb = (uint8_t)(payload_len & 0x00FF);
763 phr.phra = (uint8_t)((payload_len >> 8) & 0x0007);
764#if CC1200_802154G_WHITENING
766 phr.phra |= (1 << 3);
768#if CC1200_802154G_CRC16
770 phr.phra |= (1 << 4);
776 rf_flags &= ~RF_RX_PROCESSING_PKT;
783 burst_write(CC1200_TXFIFO, (uint8_t *)&phr, PHR_LEN);
786 burst_write(CC1200_TXFIFO, (uint8_t *)&payload_len, PHR_LEN);
794transmit(
unsigned short transmit_len)
801 INFO(
"RF: Transmit (%d)\n", transmit_len);
803 if(transmit_len != tx_pkt_len) {
804 ERROR(
"RF: TX length mismatch!\n");
809 rf_flags |= RF_TX_ACTIVE;
811 if(!(rf_flags & RF_ON)) {
820 if(!channel_clear()) {
825 rf_flags &= ~RF_TX_ACTIVE;
843 if(new_txpower != txpower) {
844 update_txpower(new_txpower);
855#if CC1200_WITH_TX_BUF
856 txret = idle_tx_rx(tx_pkt, tx_pkt_len);
858 txret = idle_tx_rx(NULL, tx_pkt_len);
868 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_RX,
869 CC1200_RF_CFG.tx_rx_turnaround);
871 ENABLE_GPIO_INTERRUPTS();
883#ifdef RF_FORCE_CALIBRATION
884 rf_flags |= RF_FORCE_CALIBRATION;
898 rf_flags &= ~RF_TX_ACTIVE;
906send(
const void *payload,
unsigned short payload_len)
911 INFO(
"RF: Send (%d)\n", payload_len);
914 if((ret = prepare(payload, payload_len)) ==
RADIO_TX_OK) {
915 ret = transmit(payload_len);
924read(
void *buf,
unsigned short buf_len)
931 rssi = (int8_t)rx_pkt[rx_pkt_len - 2] + (
int)CC1200_RF_CFG.rssi_offset;
933 uint8_t crc_lqi = rx_pkt[rx_pkt_len - 1];
935 len = rx_pkt_len - APPENDIX_LEN;
939 ERROR(
"RF: Failed to read packet (too big)!\n");
943 INFO(
"RF: Read (%d bytes, %d dBm)\n", len, rssi);
945 memcpy((
void *)buf, (
const void *)rx_pkt, len);
950 packetbuf_set_attr(PACKETBUF_ATTR_RSSI, rssi);
952 packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY,
953 crc_lqi & ~(1 << 7));
970 uint8_t cca, was_off = 0;
972 if(SPI_IS_LOCKED()) {
977 if(!(rf_flags & RF_ON)) {
985 RF_ASSERT(state() == STATE_RX);
994 if(cc1200_arch_gpio0_read_pin() == 1) {
996 INFO(
"RF: CCA (0)\n");
1003 if(new_cca_threshold != cca_threshold) {
1004 update_cca_threshold(new_cca_threshold);
1009 & CC1200_CARRIER_SENSE_VALID),
1011 RF_ASSERT(rssi0 & CC1200_CARRIER_SENSE_VALID);
1013 if(rssi0 & CC1200_CARRIER_SENSE) {
1015 INFO(
"RF: CCA (0)\n");
1019 INFO(
"RF: CCA (1)\n");
1043receiving_packet(
void)
1048 if((rf_flags & (RF_ON | RF_TX_ACTIVE)) == RF_ON) {
1050 if((cc1200_arch_gpio0_read_pin() == 1) || (rx_pkt_len != 0)) {
1070 INFO(
"RF: Receiving (%d)\n", ret);
1080 ret = ((rx_pkt_len != 0) ? 1 : 0);
1081 if(ret == 0 && !SPI_IS_LOCKED()) {
1083 ret = (single_read(CC1200_NUM_RXBYTES) > 0);
1087 INFO(
"RF: Pending (%d)\n", ret);
1100 if(!(rf_flags & RF_ON)) {
1102 if(SPI_IS_LOCKED()) {
1109 cc1200_arch_spi_select();
1112 RF_ASSERT((cc1200_arch_gpio0_read_pin() == 0));
1113 cc1200_arch_spi_deselect();
1115 rf_flags = RF_INITIALIZED;
1119 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
1122 idle_calibrate_rx();
1126#if CC1200_USE_RX_WATCHDOG
1133 INFO(
"RF: Already on\n");
1148 if(rf_flags & RF_ON) {
1150 if(SPI_IS_LOCKED()) {
1158 if(single_read(CC1200_NUM_RXBYTES) > 0) {
1161 cc1200_rx_interrupt();
1162 if(SPI_IS_LOCKED()) {
1172 single_write(CC1200_IOCFG0, CC1200_IOCFG_RXFIFO_CHIP_RDY_N);
1175 strobe(CC1200_SPWD);
1178 rf_flags = RF_INITIALIZED;
1182#if CC1200_USE_RX_WATCHDOG
1187 INFO(
"RF: Already off\n");
1204 int16_t rssi0, rssi1;
1205 uint8_t was_off = 0;
1208 if(!(rf_flags & RF_ON)) {
1215 & CC1200_CARRIER_SENSE_VALID),
1217 RF_ASSERT(rssi0 & CC1200_CARRIER_SENSE_VALID);
1218 rssi1 = (int8_t)single_read(CC1200_RSSI1) + (int)CC1200_RF_CFG.rssi_offset;
1240 if(rf_flags & RF_ON) {
1278 *value = get_rssi();
1311#if CC1200_802154G_CRC16
1322 *value = (
radio_value_t)8*1000*1000 / CC1200_RF_CFG.bitrate;
1337 case RADIO_CONST_MAX_PAYLOAD_LEN:
1371 if(set_channel(value) == CHANNEL_OUT_OF_LIMITS) {
1392 rx_mode_value = value;
1397 tx_mode_value = value;
1411 new_txpower = (int8_t)value;
1425 new_cca_threshold = (int8_t)value;
1441get_object(radio_param_t param,
void *dest,
size_t size)
1444 if(size !=
sizeof(rtimer_clock_t) || !dest) {
1447 *(rtimer_clock_t *)dest = sfd_timestamp;
1451#if MAC_CONF_WITH_TSCH
1452 if(param == RADIO_CONST_TSCH_TIMING) {
1453 if(size !=
sizeof(uint16_t *) || !dest) {
1457 *(
const uint16_t **)dest = CC1200_RF_CFG.tsch_timing;
1468set_object(radio_param_t param,
const void *src,
size_t size)
1484strobe(uint8_t strobe)
1489 cc1200_arch_spi_select();
1490 ret = cc1200_arch_spi_rw_byte(strobe);
1491 cc1200_arch_spi_deselect();
1502 cc1200_arch_spi_select();
1503 cc1200_arch_spi_rw_byte(CC1200_SRES);
1509 cc1200_arch_spi_deselect();
1515single_write(uint16_t
addr, uint8_t val)
1520 cc1200_arch_spi_select();
1521 if(CC1200_IS_EXTENDED_ADDR(
addr)) {
1522 cc1200_arch_spi_rw_byte(CC1200_EXTENDED_WRITE_CMD);
1523 cc1200_arch_spi_rw_byte((uint8_t)
addr);
1525 cc1200_arch_spi_rw_byte(
addr | CC1200_WRITE_BIT);
1527 ret = cc1200_arch_spi_rw_byte(val);
1528 cc1200_arch_spi_deselect();
1536single_read(uint16_t
addr)
1541 cc1200_arch_spi_select();
1542 if(CC1200_IS_EXTENDED_ADDR(
addr)) {
1543 cc1200_arch_spi_rw_byte(CC1200_EXTENDED_READ_CMD);
1544 cc1200_arch_spi_rw_byte((uint8_t)
addr);
1546 cc1200_arch_spi_rw_byte(
addr | CC1200_READ_BIT);
1548 ret = cc1200_arch_spi_rw_byte(0);
1549 cc1200_arch_spi_deselect();
1557burst_write(uint16_t
addr,
const uint8_t *data, uint8_t data_len)
1560 cc1200_arch_spi_select();
1561 if(CC1200_IS_EXTENDED_ADDR(
addr)) {
1562 cc1200_arch_spi_rw_byte(CC1200_EXTENDED_BURST_WRITE_CMD);
1563 cc1200_arch_spi_rw_byte((uint8_t)
addr);
1565 cc1200_arch_spi_rw_byte(
addr | CC1200_WRITE_BIT | CC1200_BURST_BIT);
1567 cc1200_arch_spi_rw(NULL, data, data_len);
1568 cc1200_arch_spi_deselect();
1574burst_read(uint16_t
addr, uint8_t *data, uint8_t data_len)
1577 cc1200_arch_spi_select();
1578 if(CC1200_IS_EXTENDED_ADDR(
addr)) {
1579 cc1200_arch_spi_rw_byte(CC1200_EXTENDED_BURST_READ_CMD);
1580 cc1200_arch_spi_rw_byte((uint8_t)
addr);
1582 cc1200_arch_spi_rw_byte(
addr | CC1200_READ_BIT | CC1200_BURST_BIT);
1584 cc1200_arch_spi_rw(data, NULL, data_len);
1585 cc1200_arch_spi_deselect();
1591write_reg_settings(
const registerSetting_t *reg_settings,
1592 uint16_t sizeof_reg_settings)
1595 int i = sizeof_reg_settings /
sizeof(registerSetting_t);
1597 if(reg_settings != NULL) {
1599 single_write(reg_settings->addr,
1613#if CC1200_RF_TESTMODE
1624 write_reg_settings(CC1200_RF_CFG.register_settings,
1625 CC1200_RF_CFG.size_of_register_settings);
1628#if CC1200_FREQ_OFFSET
1630 single_write(CC1200_FREQOFF1, (uint8_t)(CC1200_FREQ_OFFSET >> 8));
1632 single_write(CC1200_FREQOFF0, (uint8_t)(CC1200_FREQ_OFFSET));
1636 single_write(CC1200_AGC_GAIN_ADJUST, (int8_t)CC1200_RF_CFG.rssi_offset);
1642#if (CC1200_RF_TESTMODE == 1) || (CC1200_RF_TESTMODE == 2)
1644 strobe(CC1200_SFTX);
1645 single_write(CC1200_TXFIRST, 0);
1646 single_write(CC1200_TXLAST, 0xFF);
1647 update_txpower(CC1200_CONST_TX_POWER_MAX);
1648 single_write(CC1200_PKT_CFG2, 0x02);
1649 freq = calculate_freq(CC1200_DEFAULT_CHANNEL - CC1200_RF_CFG.min_channel);
1650 single_write(CC1200_FREQ0, ((uint8_t *)&freq)[0]);
1651 single_write(CC1200_FREQ1, ((uint8_t *)&freq)[1]);
1652 single_write(CC1200_FREQ2, ((uint8_t *)&freq)[2]);
1654 printf(
"RF: Freq0 0x%02x\n", ((uint8_t *)&freq)[0]);
1655 printf(
"RF: Freq1 0x%02x\n", ((uint8_t *)&freq)[1]);
1656 printf(
"RF: Freq2 0x%02x\n", ((uint8_t *)&freq)[2]);
1658#if (CC1200_RF_TESTMODE == 1)
1659 single_write(CC1200_SYNC_CFG1, 0xE8);
1660 single_write(CC1200_PREAMBLE_CFG1, 0x00);
1661 single_write(CC1200_MDMCFG1, 0x46);
1662 single_write(CC1200_PKT_CFG0, 0x40);
1663 single_write(CC1200_FS_DIG1, 0x07);
1664 single_write(CC1200_FS_DIG0, 0xAA);
1665 single_write(CC1200_FS_DVC1, 0xFF);
1666 single_write(CC1200_FS_DVC0, 0x17);
1669#if (CC1200_RF_TESTMODE == 2)
1670 single_write(CC1200_SYNC_CFG1, 0xE8);
1671 single_write(CC1200_PREAMBLE_CFG1, 0x00);
1672 single_write(CC1200_MDMCFG1, 0x06);
1673 single_write(CC1200_PA_CFG1, 0x3F);
1674 single_write(CC1200_MDMCFG2, 0x03);
1675 single_write(CC1200_FS_DIG1, 0x07);
1676 single_write(CC1200_FS_DIG0, 0xAA);
1677 single_write(CC1200_FS_DVC0, 0x17);
1678 single_write(CC1200_SERIAL_STATUS, 0x08);
1684#if (CC1200_RF_TESTMODE == 1)
1687 leds_off(LEDS_YELLOW);
1692 leds_on(LEDS_YELLOW);
1696 leds_off(LEDS_GREEN);
1701 leds_on(LEDS_GREEN);
1705#elif (CC1200_RF_TESTMODE == 3)
1708 single_write(CC1200_IOCFG3, CC1200_IOCFG_CARRIER_SENSE);
1709 single_write(CC1200_IOCFG2, CC1200_IOCFG_SERIAL_CLK);
1710 single_write(CC1200_IOCFG0, CC1200_IOCFG_SERIAL_RX);
1711 update_cca_threshold(CC1200_RF_CFG.cca_threshold);
1712 freq = calculate_freq(CC1200_DEFAULT_CHANNEL - CC1200_RF_CFG.min_channel);
1713 single_write(CC1200_FREQ0, ((uint8_t *)&freq)[0]);
1714 single_write(CC1200_FREQ1, ((uint8_t *)&freq)[1]);
1715 single_write(CC1200_FREQ2, ((uint8_t *)&freq)[2]);
1722 leds_off(LEDS_GREEN);
1723 leds_on(LEDS_YELLOW);
1726 leds_off(LEDS_YELLOW);
1727 leds_on(LEDS_GREEN);
1731 if(cc1200_arch_gpio3_read_pin() == 1) {
1746 single_write(CC1200_IOCFG3, GPIO3_IOCFG);
1747 single_write(CC1200_IOCFG2, GPIO2_IOCFG);
1748 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
1750 reg = single_read(CC1200_SETTLING_CFG);
1763 single_write(CC1200_SETTLING_CFG, reg);
1766 reg = single_read(CC1200_RFEND_CFG1);
1772 single_write(CC1200_RFEND_CFG1, reg);
1775 reg = single_read(CC1200_RFEND_CFG0);
1780 single_write(CC1200_RFEND_CFG0, reg);
1788 single_write(CC1200_PKT_CFG2, (1 << 5));
1790 single_write(CC1200_PKT_CFG2, 0x00);
1794 reg = single_read(CC1200_PKT_CFG1);
1800 single_write(CC1200_PKT_CFG1, reg);
1803 reg = single_read(CC1200_PKT_CFG0);
1806 single_write(CC1200_PKT_CFG0, reg);
1808#ifdef FIFO_THRESHOLD
1810 single_write(CC1200_FIFO_CFG, FIFO_THRESHOLD);
1820#if STATE_USES_MARC_STATE
1821 return single_read(CC1200_MARCSTATE) & 0x1f;
1823 return strobe(CC1200_SNOP) & 0x70;
1834#ifdef RF_FORCE_CALIBRATION
1835 if (!(rf_flags & RF_FORCE_CALIBRATION)
1836 && ((
clock_seconds() - cal_timer) < CC1200_CAL_TIMEOUT_SECONDS)) {
1840 rf_flags &= ~RF_FORCE_CALIBRATION;
1843 INFO(
"RF: Calibrate\n");
1845 strobe(CC1200_SCAL);
1846 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_CALIBRATE,
RTIMER_SECOND / 100);
1847 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_IDLE,
RTIMER_SECOND / 100);
1849#if CC1200_CAL_TIMEOUT_SECONDS
1863 DISABLE_GPIO_INTERRUPTS();
1868 ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
1869 ENERGEST_OFF(ENERGEST_TYPE_TRANSMIT);
1873 if(s == STATE_IDLE) {
1875 }
else if(s == STATE_RX_FIFO_ERR) {
1876 WARNING(
"RF: RX FIFO error!\n");
1877 strobe(CC1200_SFRX);
1878 }
else if(s == STATE_TX_FIFO_ERR) {
1879 WARNING(
"RF: TX FIFO error!\n");
1880 strobe(CC1200_SFTX);
1883 strobe(CC1200_SIDLE);
1884 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_IDLE,
RTIMER_SECOND / 100);
1890idle_calibrate_rx(
void)
1893 RF_ASSERT(state() == STATE_IDLE);
1899 rf_flags &= ~RF_RX_PROCESSING_PKT;
1900 strobe(CC1200_SFRX);
1904 ENABLE_GPIO_INTERRUPTS();
1906 ENERGEST_ON(ENERGEST_TYPE_LISTEN);
1915 uint8_t s = state();
1917 if(s == STATE_IDLE) {
1919 }
else if(s == STATE_RX_FIFO_ERR) {
1920 WARNING(
"RF: RX FIFO error!\n");
1921 strobe(CC1200_SFRX);
1922 }
else if(s == STATE_TX_FIFO_ERR) {
1923 WARNING(
"RF: TX FIFO error!\n");
1924 strobe(CC1200_SFTX);
1926 strobe(CC1200_SIDLE);
1927 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_IDLE,
1932 rf_flags &= ~RF_RX_PROCESSING_PKT;
1935 ENABLE_GPIO_INTERRUPTS();
1937 strobe(CC1200_SFRX);
1945idle_tx_rx(
const uint8_t *payload, uint16_t payload_len)
1947#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
1953 rf_flags &= ~RF_RX_PROCESSING_PKT;
1954 strobe(CC1200_SFRX);
1957 single_write(CC1200_IOCFG0, CC1200_IOCFG_MARC_2PIN_STATUS_0);
1959#if CC1200_WITH_TX_BUF
1961 copy_header_to_tx_fifo(payload_len);
1970#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
1971 to_write = MIN(payload_len, (CC1200_FIFO_SIZE - PHR_LEN));
1972 burst_write(CC1200_TXFIFO, payload, to_write);
1973 bytes_left_to_write = payload_len - to_write;
1974 p = payload + to_write;
1976 burst_write(CC1200_TXFIFO, payload, payload_len);
1982 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_FSTXON,
RTIMER_SECOND / 100);
1995 ENERGEST_ON(ENERGEST_TYPE_TRANSMIT);
1997 if((cc1200_arch_gpio0_read_pin() == 0) &&
1998 (single_read(CC1200_NUM_TXBYTES) != 0)) {
2005 ERROR(
"RF: TX doesn't start!\n");
2006#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
2007 single_write(CC1200_IOCFG2, GPIO2_IOCFG);
2012 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
2018#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN)) && CC1200_WITH_TX_BUF
2019 if(bytes_left_to_write != 0) {
2024 if((bytes_left_to_write != 0) &&
2025 (cc1200_arch_gpio2_read_pin() == 0)) {
2027 to_write = MIN(bytes_left_to_write, FIFO_THRESHOLD);
2028 burst_write(CC1200_TXFIFO, p, to_write);
2029 bytes_left_to_write -= to_write;
2031 t0 += CC1200_RF_CFG.tx_pkt_lifetime;
2033 }
while((cc1200_arch_gpio0_read_pin() == 1) &&
2034 RTIMER_CLOCK_LT(
RTIMER_NOW(), t0 + CC1200_RF_CFG.tx_pkt_lifetime));
2044 if((s != STATE_RX) && (s != STATE_SETTLING)) {
2051 INFO(
"RF: TX failure!\n");
2054 single_write(CC1200_IOCFG2, GPIO2_IOCFG);
2058 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
2067 CC1200_RF_CFG.tx_pkt_lifetime);
2072 CC1200_RF_CFG.tx_pkt_lifetime);
2075 if(cc1200_arch_gpio0_read_pin() == 1) {
2077 ERROR(
"RF: TX takes to long!\n");
2078#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
2080 single_write(CC1200_IOCFG2, GPIO2_IOCFG);
2085 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
2091#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
2093 single_write(CC1200_IOCFG2, GPIO2_IOCFG);
2097 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
2101 ENERGEST_SWITCH(ENERGEST_TYPE_TRANSMIT, ENERGEST_TYPE_LISTEN);
2109update_txpower(int8_t txpower_dbm)
2112 uint8_t reg = single_read(CC1200_PA_CFG1);
2116 reg |= ((((txpower_dbm + 18) * 2) - 1) & 0x3F);
2117 single_write(CC1200_PA_CFG1, reg);
2119 txpower = txpower_dbm;
2125update_cca_threshold(int8_t threshold_dbm)
2128 single_write(CC1200_AGC_CS_THR, (uint8_t)threshold_dbm);
2129 cca_threshold = threshold_dbm;
2135calculate_freq(uint8_t channel)
2140 freq = CC1200_RF_CFG.chan_center_freq0 + (channel * CC1200_RF_CFG.chan_spacing) / 1000 ;
2141 freq *= FREQ_MULTIPLIER;
2142 freq /= FREQ_DIVIDER;
2150set_channel(uint8_t channel)
2153 uint8_t was_off = 0;
2156 channel %= (CC1200_RF_CFG.max_channel - CC1200_RF_CFG.min_channel + 1);
2157 channel += CC1200_RF_CFG.min_channel;
2164 if(channel == rf_channel) {
2169 if(channel < CC1200_RF_CFG.min_channel ||
2170 channel > CC1200_RF_CFG.max_channel) {
2172 return CHANNEL_OUT_OF_LIMITS;
2175 if(SPI_IS_LOCKED() || (rf_flags & RF_TX_ACTIVE) || receiving_packet()) {
2179 new_rf_channel = channel;
2180 rf_flags |= RF_UPDATE_CHANNEL;
2182 INFO(
"RF: Channel update postponed\n");
2184 return CHANNEL_UPDATE_POSTPONED;
2187 rf_flags &= ~RF_UPDATE_CHANNEL;
2189 INFO(
"RF: Channel update (%d)\n", channel);
2191 if(!(rf_flags & RF_ON)) {
2200 freq = calculate_freq(channel - CC1200_RF_CFG.min_channel);
2201 single_write(CC1200_FREQ0, ((uint8_t *)&freq)[0]);
2202 single_write(CC1200_FREQ1, ((uint8_t *)&freq)[1]);
2203 single_write(CC1200_FREQ2, ((uint8_t *)&freq)[2]);
2205 rf_channel = channel;
2209#ifdef RF_FORCE_CALIBRATION
2210 rf_flags |= RF_FORCE_CALIBRATION;
2212 idle_calibrate_rx();
2221 return CHANNEL_UPDATE_SUCCEEDED;
2227is_broadcast_addr(uint8_t mode, uint8_t *
addr)
2230 int i = mode == FRAME802154_SHORTADDRMODE ? 2 : 8;
2233 if(
addr[i] != 0xff) {
2243addr_check_auto_ack(uint8_t *frame, uint16_t frame_len)
2279 uint8_t ack[ACK_LEN] = { FRAME802154_ACKFRAME, 0, info154.
seq };
2281#if (RXOFF_MODE_RX == 1)
2289 prepare((
const uint8_t *)ack, ACK_LEN);
2290 idle_tx_rx((
const uint8_t *)ack, ACK_LEN);
2294 return ADDR_CHECK_OK_ACK_SEND;
2298 return ADDR_CHECK_OK;
2302 return ADDR_CHECK_FAILED;
2308 return INVALID_FRAME;
2317cc1200_rx_interrupt(
void)
2323 uint8_t num_rxbytes;
2325 static uint16_t payload_len;
2330 static uint16_t bytes_read;
2336 static uint8_t buf[CC1200_MAX_PAYLOAD_LEN + APPENDIX_LEN];
2344 int gpio2 = cc1200_arch_gpio2_read_pin();
2345 int gpio0 = cc1200_arch_gpio0_read_pin();
2346 if((rf_flags & RF_RX_ONGOING) == 0 && gpio2 > 0) {
2347 rf_flags |= RF_RX_ONGOING;
2351 rf_flags &= ~RF_RX_ONGOING;
2355 if(SPI_IS_LOCKED()) {
2363 rf_flags |= RF_POLL_RX_INTERRUPT;
2368 rf_flags &= ~RF_POLL_RX_INTERRUPT;
2380 if((s == STATE_RX_FIFO_ERR) || (s == STATE_TX_FIFO_ERR)) {
2388 num_rxbytes = single_read(CC1200_NUM_RXBYTES);
2390 if(num_rxbytes == 0) {
2398 INFO(
"RF: RX FIFO empty!\n");
2404 if(!(rf_flags & RF_RX_PROCESSING_PKT)) {
2413 if(num_rxbytes < PHR_LEN) {
2415 WARNING(
"RF: PHR incomplete!\n");
2422 burst_read(CC1200_RXFIFO,
2425 payload_len = (phr.phra & 0x07);
2427 payload_len += phr.phrb;
2429 if(phr.phra & (1 << 4)) {
2438 burst_read(CC1200_RXFIFO,
2439 (uint8_t *)&payload_len,
2443 if(payload_len < ACK_LEN) {
2445 WARNING(
"RF: Packet too short!\n");
2451 if(payload_len > CC1200_MAX_PAYLOAD_LEN) {
2453 WARNING(
"RF: Packet to long!\n");
2461 num_rxbytes -= PHR_LEN;
2463 rf_flags |= RF_RX_PROCESSING_PKT;
2469 if(rf_flags & RF_RX_PROCESSING_PKT) {
2476 if((num_rxbytes + bytes_read) > (payload_len + CC_APPENDIX_LEN)) {
2484 WARNING(
"RF: RX length mismatch %d %d %d!\n", num_rxbytes,
2493 burst_read(CC1200_RXFIFO,
2497 bytes_read += num_rxbytes;
2500 if(bytes_read == (payload_len + CC_APPENDIX_LEN)) {
2509 uint8_t crc_lqi = buf[bytes_read - 1];
2511 int8_t rssi = single_read(CC1200_RSSI1);
2512 uint8_t crc_lqi = single_read(CC1200_LQI_VAL);
2515 if(!(crc_lqi & (1 << 7))) {
2517 INFO(
"RF: CRC error!\n");
2518 }
else if(rx_pkt_len != 0) {
2520 WARNING(
"RF: Packet pending!\n");
2523 int ret = addr_check_auto_ack(buf, bytes_read);
2525 if((ret == ADDR_CHECK_OK) ||
2526 (ret == ADDR_CHECK_OK_ACK_SEND)) {
2530 buf[bytes_read++] = (uint8_t)rssi;
2531 buf[bytes_read++] = crc_lqi;
2533 rx_pkt_len = bytes_read;
2534 memcpy((
void *)rx_pkt, buf, rx_pkt_len);
Header file for the energy estimation mechanism.
unsigned long clock_seconds(void)
Get the current value of the platform seconds.
void clock_delay_usec(uint16_t dt)
Delay a given number of microseconds.
void clock_delay(unsigned int i)
Obsolete delay function but we implement it here since some code still uses it.
static void set_channel(uint8_t channel)
Set the current operating channel.
void watchdog_periodic(void)
Writes the WDT clear sequence.
#define CLOCK_SECOND
A second, measured in system clock time.
void etimer_reset(struct etimer *et)
Reset an event timer with the same interval as was previously set.
void etimer_stop(struct etimer *et)
Stop a pending event timer.
static bool etimer_expired(struct etimer *et)
Check if an event timer has expired.
void etimer_set(struct etimer *et, clock_time_t interval)
Set an event timer.
int frame802154_parse(uint8_t *data, int len, frame802154_t *pf)
Parses an input frame.
linkaddr_t linkaddr_node_addr
The link-layer address of the node.
bool linkaddr_cmp(const linkaddr_t *addr1, const linkaddr_t *addr2)
Compare two link-layer addresses.
void packetbuf_set_datalen(uint16_t len)
Set the length of the data in the packetbuf.
void * packetbuf_dataptr(void)
Get a pointer to the data in the packetbuf.
#define PACKETBUF_SIZE
The size of the packetbuf, in bytes.
void packetbuf_clear(void)
Clear and reset the packetbuf.
#define PROCESS(name, strname)
Declare a process.
#define PROCESS_POLLHANDLER(handler)
Specify an action when a process is polled.
#define PROCESS_BEGIN()
Define the beginning of a process.
#define PROCESS_WAIT_EVENT_UNTIL(c)
Wait for an event to be posted to the process, with an extra condition.
#define PROCESS_END()
Define the end of a process.
void process_start(struct process *p, process_data_t data)
Start a process.
#define PROCESS_CONTEXT_BEGIN(p)
Switch context to another process.
#define PROCESS_THREAD(name, ev, data)
Define the body of a process.
#define PROCESS_YIELD()
Yield the currently running process.
#define PROCESS_CONTEXT_END(p)
End a context switch.
#define PROCESS_YIELD_UNTIL(c)
Yield the currently running process until a condition occurs.
void process_poll(struct process *p)
Request a process to be polled.
#define RADIO_RX_MODE_ADDRESS_FILTER
Enable address-based frame filtering.
#define RADIO_RX_MODE_POLL_MODE
Enable/disable/get the state of radio driver poll mode operation.
#define RADIO_TX_MODE_SEND_ON_CCA
Radio TX mode control / retrieval.
enum radio_result_e radio_result_t
Radio return values when setting or getting radio parameters.
int radio_value_t
Each radio has a set of parameters that designate the current configuration and state of the radio.
#define RADIO_RX_MODE_AUTOACK
Enable automatic transmission of ACK frames.
@ RADIO_RESULT_NOT_SUPPORTED
The parameter is not supported.
@ RADIO_RESULT_INVALID_VALUE
The value argument was incorrect.
@ RADIO_RESULT_OK
The parameter was set/read successfully.
@ RADIO_PARAM_POWER_MODE
When getting the value of this parameter, the radio driver should indicate whether the radio is on or...
@ RADIO_CONST_PHY_OVERHEAD
The physical layer header (PHR) + MAC layer footer (MFR) overhead in bytes.
@ RADIO_PARAM_RSSI
Received signal strength indicator in dBm.
@ RADIO_PARAM_LAST_PACKET_TIMESTAMP
Last packet timestamp, of type rtimer_clock_t.
@ RADIO_PARAM_LAST_RSSI
The RSSI value of the last received packet.
@ RADIO_CONST_BYTE_AIR_TIME
The air time of one byte in usec, e.g.
@ RADIO_PARAM_RX_MODE
Radio receiver mode determines if the radio has address filter (RADIO_RX_MODE_ADDRESS_FILTER) and aut...
@ RADIO_PARAM_CHANNEL
Channel used for radio communication.
@ RADIO_CONST_DELAY_BEFORE_RX
The delay in usec between turning on the radio and it being actually listening (able to hear a preamb...
@ RADIO_PARAM_TXPOWER
Transmission power in dBm.
@ RADIO_PARAM_64BIT_ADDR
Long (64 bits) address for the radio, which is used by the address filter.
@ RADIO_CONST_DELAY_BEFORE_TX
The delay in usec between a call to the radio API's transmit function and the end of SFD transmission...
@ RADIO_CONST_CHANNEL_MAX
The highest radio channel number.
@ RADIO_PARAM_PAN_ID
The personal area network identifier (PAN ID), which is used by the h/w frame filtering functionality...
@ RADIO_PARAM_CCA_THRESHOLD
Clear channel assessment threshold in dBm.
@ RADIO_CONST_TXPOWER_MIN
The minimum transmission power in dBm.
@ RADIO_CONST_CHANNEL_MIN
The lowest radio channel number.
@ RADIO_CONST_TXPOWER_MAX
The maximum transmission power in dBm.
@ RADIO_CONST_DELAY_BEFORE_DETECT
The delay in usec between the end of SFD reception for an incoming frame and the radio API starting t...
@ RADIO_PARAM_16BIT_ADDR
The short address (16 bits) for the radio, which is used by the h/w filter.
@ RADIO_PARAM_TX_MODE
Radio transmission mode determines if the radio has send on CCA (RADIO_TX_MODE_SEND_ON_CCA) enabled o...
@ RADIO_POWER_MODE_OFF
Radio powered off and in the lowest possible power consumption state.
@ RADIO_POWER_MODE_ON
Radio powered on and able to receive frames.
@ RADIO_TX_COLLISION
TX failed due to a collision.
@ RADIO_TX_ERR
An error occurred during transmission.
@ RADIO_TX_OK
TX was successful and where an ACK was requested one was received.
#define RTIMER_BUSYWAIT_UNTIL(cond, max_time)
Busy-wait until a condition for at most max_time.
#define RTIMER_SECOND
Number of rtimer ticks for 1 second.
#define RTIMER_BUSYWAIT(duration)
Busy-wait for a fixed duration.
#define RTIMER_NOW()
Get the current clock time.
Header file for the LED HAL.
Include file for the Contiki low-layer network stack (NETSTACK)
Header file for the Packet buffer (packetbuf) management.
uint8_t ack_required
1 bit.
uint8_t dest_addr_mode
2 bit.
Parameters used by the frame802154_create() function.
uint8_t seq
Sequence number.
uint8_t dest_addr[8]
Destination address.
frame802154_fcf_t fcf
Frame control field
void(* input)(void)
Callback for getting notified of incoming packet.
The structure of a Contiki-NG radio device driver.
radio_result_t(* get_object)(radio_param_t param, void *dest, size_t size)
Get a radio parameter object.
int(* read)(void *buf, unsigned short buf_len)
Read a received packet into a buffer.
int(* prepare)(const void *payload, unsigned short payload_len)
Prepare the radio with a packet to be sent.
radio_result_t(* set_value)(radio_param_t param, radio_value_t value)
Set a radio parameter value.
int(* off)(void)
Turn the radio off.
int(* init)(void)
Initialise the radio hardware.
int(* send)(const void *payload, unsigned short payload_len)
Prepare & transmit a packet.
int(* receiving_packet)(void)
Check if the radio driver is currently receiving a packet.
radio_result_t(* set_object)(radio_param_t param, const void *src, size_t size)
Set a radio parameter object.
int(* on)(void)
Turn the radio on.
int(* transmit)(unsigned short transmit_len)
Send the packet that has previously been prepared.
int(* pending_packet)(void)
Check if a packet has been received and is available in the radio driver's buffers.
radio_result_t(* get_value)(radio_param_t param, radio_value_t *value)
Get a radio parameter value.
int(* channel_clear)(void)
Perform a Clear-Channel Assessment (CCA) to find out if there is a packet in the air or not.
static uip_ds6_addr_t * addr
Pointer to a nbr cache entry.