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LPSTK.c
1/*
2 * Copyright (c) 2017-2019, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/*
34 * ====================== LPSTK.c ===================================
35 * This file is responsible for setting up the board specific items for the
36 * LPSTK board.
37 */
38
39#include <stdbool.h>
40#include <stddef.h>
41#include <stdint.h>
42
43#include <ti/devices/DeviceFamily.h>
44#include DeviceFamily_constructPath(driverlib/ioc.h)
45#include DeviceFamily_constructPath(driverlib/udma.h)
46#include DeviceFamily_constructPath(inc/hw_ints.h)
47#include DeviceFamily_constructPath(inc/hw_memmap.h)
48
49#include "LPSTK.h"
50
51/*
52 * =============================== ADCBuf ===============================
53 */
54#include <ti/drivers/ADCBuf.h>
55#include <ti/drivers/adcbuf/ADCBufCC26X2.h>
56
57ADCBufCC26X2_Object adcBufCC26xxObjects[LPSTK_ADCBUFCOUNT];
58
59/*
60 * This table converts a virtual adc channel into a dio and internal analogue
61 * input signal. This table is necessary for the functioning of the adcBuf
62 * driver. Comment out unused entries to save flash. Dio and internal signal
63 * pairs are hardwired. Do not remap them in the table. You may reorder entire
64 * entries. The mapping of dio and internal signals is package dependent.
65 */
66const ADCBufCC26X2_AdcChannelLutEntry ADCBufCC26X2_adcChannelLut[LPSTK_ADCBUF0CHANNELCOUNT] = {
67 {LPSTK_DIO24_ANALOG, ADC_COMPB_IN_AUXIO6},
68 {LPSTK_DIO26_ANALOG, ADC_COMPB_IN_AUXIO4},
69 {LPSTK_DIO28_ANALOG, ADC_COMPB_IN_AUXIO2},
70 {LPSTK_DIO29_ANALOG, ADC_COMPB_IN_AUXIO1},
71 {PIN_UNASSIGNED, ADC_COMPB_IN_VDDS},
72 {PIN_UNASSIGNED, ADC_COMPB_IN_DCOUPL},
73 {PIN_UNASSIGNED, ADC_COMPB_IN_VSS},
74};
75
76const ADCBufCC26X2_HWAttrs adcBufCC26xxHWAttrs[LPSTK_ADCBUFCOUNT] = {
77 {
78 .intPriority = ~0,
79 .swiPriority = 0,
80 .adcChannelLut = ADCBufCC26X2_adcChannelLut,
81 .gpTimerUnit = LPSTK_GPTIMER0A,
82 }
83};
84
85const ADCBuf_Config ADCBuf_config[LPSTK_ADCBUFCOUNT] = {
86 {
87 &ADCBufCC26X2_fxnTable,
88 &adcBufCC26xxObjects[LPSTK_ADCBUF0],
89 &adcBufCC26xxHWAttrs[LPSTK_ADCBUF0]
90 },
91};
92
93const uint_least8_t ADCBuf_count = LPSTK_ADCBUFCOUNT;
94
95/*
96 * =============================== ADC ===============================
97 */
98#include <ti/drivers/ADC.h>
99#include <ti/drivers/adc/ADCCC26XX.h>
100
101ADCCC26XX_Object adcCC26xxObjects[LPSTK_ADCCOUNT];
102
103const ADCCC26XX_HWAttrs adcCC26xxHWAttrs[LPSTK_ADCCOUNT] = {
104 {
105 .adcDIO = LPSTK_DIO24_ANALOG,
106 .adcCompBInput = ADC_COMPB_IN_AUXIO6,
107 .refSource = ADCCC26XX_FIXED_REFERENCE,
108 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
109 .inputScalingEnabled = true,
110 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
111 .returnAdjustedVal = false
112 },
113 {
114 .adcDIO = LPSTK_DIO26_ANALOG,
115 .adcCompBInput = ADC_COMPB_IN_AUXIO4,
116 .refSource = ADCCC26XX_FIXED_REFERENCE,
117 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
118 .inputScalingEnabled = true,
119 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
120 .returnAdjustedVal = false
121 },
122 {
123 .adcDIO = LPSTK_DIO28_ANALOG,
124 .adcCompBInput = ADC_COMPB_IN_AUXIO2,
125 .refSource = ADCCC26XX_FIXED_REFERENCE,
126 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
127 .inputScalingEnabled = true,
128 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
129 .returnAdjustedVal = false
130 },
131 {
132 .adcDIO = LPSTK_DIO29_ANALOG,
133 .adcCompBInput = ADC_COMPB_IN_AUXIO1,
134 .refSource = ADCCC26XX_FIXED_REFERENCE,
135 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
136 .inputScalingEnabled = true,
137 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
138 .returnAdjustedVal = false
139 },
140 {
141 .adcDIO = PIN_UNASSIGNED,
142 .adcCompBInput = ADC_COMPB_IN_DCOUPL,
143 .refSource = ADCCC26XX_FIXED_REFERENCE,
144 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
145 .inputScalingEnabled = true,
146 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
147 .returnAdjustedVal = false
148 },
149 {
150 .adcDIO = PIN_UNASSIGNED,
151 .adcCompBInput = ADC_COMPB_IN_VSS,
152 .refSource = ADCCC26XX_FIXED_REFERENCE,
153 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
154 .inputScalingEnabled = true,
155 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
156 .returnAdjustedVal = false
157 },
158 {
159 .adcDIO = PIN_UNASSIGNED,
160 .adcCompBInput = ADC_COMPB_IN_VDDS,
161 .refSource = ADCCC26XX_FIXED_REFERENCE,
162 .samplingDuration = ADCCC26XX_SAMPLING_DURATION_2P7_US,
163 .inputScalingEnabled = true,
164 .triggerSource = ADCCC26XX_TRIGGER_MANUAL,
165 .returnAdjustedVal = false
166 }
167};
168
169const ADC_Config ADC_config[LPSTK_ADCCOUNT] = {
170 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[LPSTK_ADC0], &adcCC26xxHWAttrs[LPSTK_ADC0]},
171 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[LPSTK_ADC1], &adcCC26xxHWAttrs[LPSTK_ADC1]},
172 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[LPSTK_ADC2], &adcCC26xxHWAttrs[LPSTK_ADC2]},
173 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[LPSTK_ADC3], &adcCC26xxHWAttrs[LPSTK_ADC3]},
174 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[LPSTK_ADC4], &adcCC26xxHWAttrs[LPSTK_ADC4]},
175 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[LPSTK_ADC5], &adcCC26xxHWAttrs[LPSTK_ADC5]},
176 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[LPSTK_ADC6], &adcCC26xxHWAttrs[LPSTK_ADC6]},
177 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[LPSTK_ADCDCOUPL], &adcCC26xxHWAttrs[LPSTK_ADCDCOUPL]},
178 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[LPSTK_ADCVSS], &adcCC26xxHWAttrs[LPSTK_ADCVSS]},
179 {&ADCCC26XX_fxnTable, &adcCC26xxObjects[LPSTK_ADCVDDS], &adcCC26xxHWAttrs[LPSTK_ADCVDDS]},
180};
181
182const uint_least8_t ADC_count = LPSTK_ADCCOUNT;
183
184/*
185 * =============================== ECDH ===============================
186 */
187#include <ti/drivers/ECDH.h>
188#include <ti/drivers/ecdh/ECDHCC26X2.h>
189
190ECDHCC26X2_Object ecdhCC26X2Objects[LPSTK_ECDHCOUNT];
191
192const ECDHCC26X2_HWAttrs ecdhCC26X2HWAttrs[LPSTK_ECDHCOUNT] = {
193 {
194 .intPriority = ~0,
195 }
196};
197
198const ECDH_Config ECDH_config[LPSTK_ECDHCOUNT] = {
199 {
200 .object = &ecdhCC26X2Objects[LPSTK_ECDH0],
201 .hwAttrs = &ecdhCC26X2HWAttrs[LPSTK_ECDH0]
202 },
203};
204
205const uint_least8_t ECDH_count = LPSTK_ECDHCOUNT;
206
207/*
208 * =============================== ECDSA ===============================
209 */
210#include <ti/drivers/ECDSA.h>
211#include <ti/drivers/ecdsa/ECDSACC26X2.h>
212
213ECDSACC26X2_Object ecdsaCC26X2Objects[LPSTK_ECDSACOUNT];
214
215const ECDSACC26X2_HWAttrs ecdsaCC26X2HWAttrs[LPSTK_ECDSACOUNT] = {
216 {
217 .intPriority = ~0,
218 }
219};
220
221const ECDSA_Config ECDSA_config[LPSTK_ECDSACOUNT] = {
222 {
223 .object = &ecdsaCC26X2Objects[LPSTK_ECDSA0],
224 .hwAttrs = &ecdsaCC26X2HWAttrs[LPSTK_ECDSA0]
225 },
226};
227
228const uint_least8_t ECDSA_count = LPSTK_ECDSACOUNT;
229
230/*
231 * =============================== ECJPAKE ===============================
232 */
233#include <ti/drivers/ECJPAKE.h>
234#include <ti/drivers/ecjpake/ECJPAKECC26X2.h>
235
236ECJPAKECC26X2_Object ecjpakeCC26X2Objects[LPSTK_ECJPAKECOUNT];
237
238const ECJPAKECC26X2_HWAttrs ecjpakeCC26X2HWAttrs[LPSTK_ECJPAKECOUNT] = {
239 {
240 .intPriority = ~0,
241 }
242};
243
244const ECJPAKE_Config ECJPAKE_config[LPSTK_ECJPAKECOUNT] = {
245 {
246 .object = &ecjpakeCC26X2Objects[LPSTK_ECJPAKE0],
247 .hwAttrs = &ecjpakeCC26X2HWAttrs[LPSTK_ECJPAKE0]
248 },
249};
250
251const uint_least8_t ECJPAKE_count = LPSTK_ECJPAKECOUNT;
252
253
254/*
255 * =============================== SHA2 ===============================
256 */
257#include <ti/drivers/SHA2.h>
258#include <ti/drivers/sha2/SHA2CC26X2.h>
259
260SHA2CC26X2_Object sha2CC26X2Objects[LPSTK_SHA2COUNT];
261
262const SHA2CC26X2_HWAttrs sha2CC26X2HWAttrs[LPSTK_SHA2COUNT] = {
263 {
264 .intPriority = ~0,
265 }
266};
267
268const SHA2_Config SHA2_config[LPSTK_SHA2COUNT] = {
269 {
270 .object = &sha2CC26X2Objects[LPSTK_SHA20],
271 .hwAttrs = &sha2CC26X2HWAttrs[LPSTK_SHA20]
272 },
273};
274
275const uint_least8_t SHA2_count = LPSTK_SHA2COUNT;
276
277/*
278 * =============================== AESCCM ===============================
279 */
280#include <ti/drivers/AESCCM.h>
281#include <ti/drivers/aesccm/AESCCMCC26XX.h>
282
283AESCCMCC26XX_Object aesccmCC26XXObjects[LPSTK_AESCCMCOUNT];
284
285const AESCCMCC26XX_HWAttrs aesccmCC26XXHWAttrs[LPSTK_AESCCMCOUNT] = {
286 {
287 .intPriority = ~0,
288 }
289};
290
291const AESCCM_Config AESCCM_config[LPSTK_AESCCMCOUNT] = {
292 {
293 .object = &aesccmCC26XXObjects[LPSTK_AESCCM0],
294 .hwAttrs = &aesccmCC26XXHWAttrs[LPSTK_AESCCM0]
295 },
296};
297
298const uint_least8_t AESCCM_count = LPSTK_AESCCMCOUNT;
299
300/*
301 * =============================== AESGCM ===============================
302 */
303#include <ti/drivers/AESGCM.h>
304#include <ti/drivers/aesgcm/AESGCMCC26XX.h>
305
306AESGCMCC26XX_Object aesgcmCC26XXObjects[LPSTK_AESGCMCOUNT];
307
308const AESGCMCC26XX_HWAttrs aesgcmCC26XXHWAttrs[LPSTK_AESGCMCOUNT] = {
309 {
310 .intPriority = ~0,
311 }
312};
313
314const AESGCM_Config AESGCM_config[LPSTK_AESGCMCOUNT] = {
315 {
316 .object = &aesgcmCC26XXObjects[LPSTK_AESGCM0],
317 .hwAttrs = &aesgcmCC26XXHWAttrs[LPSTK_AESGCM0]
318 },
319};
320
321const uint_least8_t AESGCM_count = LPSTK_AESGCMCOUNT;
322
323/*
324 * =============================== AESCBC ===============================
325 */
326#include <ti/drivers/AESCBC.h>
327#include <ti/drivers/aescbc/AESCBCCC26XX.h>
328
329AESCBCCC26XX_Object aescbcCC26XXObjects[LPSTK_AESCBCCOUNT];
330
331const AESCBCCC26XX_HWAttrs aescbcCC26XXHWAttrs[LPSTK_AESCBCCOUNT] = {
332 {
333 .intPriority = ~0,
334 }
335};
336
337const AESCBC_Config AESCBC_config[LPSTK_AESCBCCOUNT] = {
338 {
339 .object = &aescbcCC26XXObjects[LPSTK_AESCBC0],
340 .hwAttrs = &aescbcCC26XXHWAttrs[LPSTK_AESCBC0]
341 },
342};
343
344const uint_least8_t AESCBC_count = LPSTK_AESCBCCOUNT;
345
346/*
347 * =============================== AESCTR ===============================
348 */
349#include <ti/drivers/AESCTR.h>
350#include <ti/drivers/aesctr/AESCTRCC26XX.h>
351
352AESCTRCC26XX_Object aesctrCC26XXObjects[LPSTK_AESCTRCOUNT];
353
354const AESCTRCC26XX_HWAttrs aesctrCC26XXHWAttrs[LPSTK_AESCTRCOUNT] = {
355 {
356 .intPriority = ~0,
357 }
358};
359
360const AESCTR_Config AESCTR_config[LPSTK_AESCTRCOUNT] = {
361 {
362 .object = &aesctrCC26XXObjects[LPSTK_AESCTR0],
363 .hwAttrs = &aesctrCC26XXHWAttrs[LPSTK_AESCTR0]
364 },
365};
366
367const uint_least8_t AESCTR_count = LPSTK_AESCTRCOUNT;
368
369/*
370 * =============================== AESECB ===============================
371 */
372#include <ti/drivers/AESECB.h>
373#include <ti/drivers/aesecb/AESECBCC26XX.h>
374
375AESECBCC26XX_Object aesecbCC26XXObjects[LPSTK_AESECBCOUNT];
376
377const AESECBCC26XX_HWAttrs aesecbCC26XXHWAttrs[LPSTK_AESECBCOUNT] = {
378 {
379 .intPriority = ~0,
380 }
381};
382
383const AESECB_Config AESECB_config[LPSTK_AESECBCOUNT] = {
384 {
385 .object = &aesecbCC26XXObjects[LPSTK_AESECB0],
386 .hwAttrs = &aesecbCC26XXHWAttrs[LPSTK_AESECB0]
387 },
388};
389
390const uint_least8_t AESECB_count = LPSTK_AESECBCOUNT;
391
392/*
393 * =============================== AESCTRDRBG ===============================
394 */
395#include <ti/drivers/AESCTRDRBG.h>
396#include <ti/drivers/aesctrdrbg/AESCTRDRBGXX.h>
397
398AESCTRDRBGXX_Object aesctrdrbgXXObjects[LPSTK_AESCTRDRBGCOUNT];
399
400const AESCTRDRBGXX_HWAttrs aesctrdrbgXXHWAttrs[LPSTK_AESCTRDRBGCOUNT] = {
401 {
402 .aesctrIndex = LPSTK_AESCTR0,
403 }
404};
405
406const AESCTRDRBG_Config AESCTRDRBG_config[LPSTK_AESCTRDRBGCOUNT] = {
407 {
408 .object = &aesctrdrbgXXObjects[LPSTK_AESCTRDRBG0],
409 .hwAttrs = &aesctrdrbgXXHWAttrs[LPSTK_AESCTRDRBG0]
410 },
411};
412
413const uint_least8_t AESCTRDRBG_count = LPSTK_AESCTRDRBGCOUNT;
414
415/*
416 * =============================== TRNG ===============================
417 */
418#include <ti/drivers/TRNG.h>
419#include <ti/drivers/trng/TRNGCC26XX.h>
420
421TRNGCC26XX_Object trngCC26XXObjects[LPSTK_TRNGCOUNT];
422
423const TRNGCC26XX_HWAttrs trngCC26X2HWAttrs[LPSTK_TRNGCOUNT] = {
424 {
425 .intPriority = ~0,
426 .swiPriority = 0,
427 .samplesPerCycle = 240000,
428 }
429};
430
431const TRNG_Config TRNG_config[LPSTK_TRNGCOUNT] = {
432 {
433 .object = &trngCC26XXObjects[LPSTK_TRNG0],
434 .hwAttrs = &trngCC26X2HWAttrs[LPSTK_TRNG0]
435 },
436};
437
438const uint_least8_t TRNG_count = LPSTK_TRNGCOUNT;
439
440/*
441 * =============================== GPIO ===============================
442 */
443#include <ti/drivers/GPIO.h>
444#include <ti/drivers/gpio/GPIOCC26XX.h>
445
446/*
447 * Array of Pin configurations
448 * NOTE: The order of the pin configurations must coincide with what was
449 * defined in LPSTK.h
450 * NOTE: Pins not used for interrupts should be placed at the end of the
451 * array. Callback entries can be omitted from callbacks array to
452 * reduce memory usage.
453 */
454GPIO_PinConfig gpioPinConfigs[] = {
455 /* Input pins */
456 GPIOCC26XX_DIO_15 | GPIO_DO_NOT_CONFIG, /* Button 0 */
457 GPIOCC26XX_DIO_14 | GPIO_DO_NOT_CONFIG, /* Button 1 */
458
459 GPIOCC26XX_DIO_15 | GPIO_DO_NOT_CONFIG, /* LPSTK_SPI_MASTER_READY */
460 GPIOCC26XX_DIO_21 | GPIO_DO_NOT_CONFIG, /* LPSTK_SPI_SLAVE_READY */
461
462 /* Output pins */
463 GPIOCC26XX_DIO_07 | GPIO_DO_NOT_CONFIG, /* Green LED */
464 GPIOCC26XX_DIO_06 | GPIO_DO_NOT_CONFIG, /* Red LED */
465
466 /* SPI Flash CSN */
467 GPIOCC26XX_DIO_20 | GPIO_DO_NOT_CONFIG,
468
469 /* SD CS */
470 GPIOCC26XX_DIO_21 | GPIO_DO_NOT_CONFIG,
471};
472
473/*
474 * Array of callback function pointers
475 * NOTE: The order of the pin configurations must coincide with what was
476 * defined in CC1352R1_LAUNCH.h
477 * NOTE: Pins not used for interrupts can be omitted from callbacks array to
478 * reduce memory usage (if placed at end of gpioPinConfigs array).
479 */
480GPIO_CallbackFxn gpioCallbackFunctions[] = {
481 NULL, /* Button 0 */
482 NULL, /* Button 1 */
483 NULL, /* LPSTK_SPI_MASTER_READY */
484 NULL, /* LPSTK_SPI_SLAVE_READY */
485};
486
487const GPIOCC26XX_Config GPIOCC26XX_config = {
488 .pinConfigs = (GPIO_PinConfig *)gpioPinConfigs,
489 .callbacks = (GPIO_CallbackFxn *)gpioCallbackFunctions,
490 .numberOfPinConfigs = LPSTK_GPIOCOUNT,
491 .numberOfCallbacks = sizeof(gpioCallbackFunctions)/sizeof(GPIO_CallbackFxn),
492 .intPriority = (~0)
493};
494
495/*
496 * =============================== GPTimer ===============================
497 * Remove unused entries to reduce flash usage both in Board.c and Board.h
498 */
499#include <ti/drivers/timer/GPTimerCC26XX.h>
500
501GPTimerCC26XX_Object gptimerCC26XXObjects[LPSTK_GPTIMERCOUNT];
502
503const GPTimerCC26XX_HWAttrs gptimerCC26xxHWAttrs[LPSTK_GPTIMERPARTSCOUNT] = {
504 { .baseAddr = GPT0_BASE, .intNum = INT_GPT0A, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT0, .pinMux = GPT_PIN_0A, },
505 { .baseAddr = GPT0_BASE, .intNum = INT_GPT0B, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT0, .pinMux = GPT_PIN_0B, },
506 { .baseAddr = GPT1_BASE, .intNum = INT_GPT1A, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT1, .pinMux = GPT_PIN_1A, },
507 { .baseAddr = GPT1_BASE, .intNum = INT_GPT1B, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT1, .pinMux = GPT_PIN_1B, },
508 { .baseAddr = GPT2_BASE, .intNum = INT_GPT2A, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT2, .pinMux = GPT_PIN_2A, },
509 { .baseAddr = GPT2_BASE, .intNum = INT_GPT2B, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT2, .pinMux = GPT_PIN_2B, },
510 { .baseAddr = GPT3_BASE, .intNum = INT_GPT3A, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT3, .pinMux = GPT_PIN_3A, },
511 { .baseAddr = GPT3_BASE, .intNum = INT_GPT3B, .intPriority = (~0), .powerMngrId = PowerCC26XX_PERIPH_GPT3, .pinMux = GPT_PIN_3B, },
512};
513
514const GPTimerCC26XX_Config GPTimerCC26XX_config[LPSTK_GPTIMERPARTSCOUNT] = {
515 { &gptimerCC26XXObjects[LPSTK_GPTIMER0], &gptimerCC26xxHWAttrs[LPSTK_GPTIMER0A], GPT_A },
516 { &gptimerCC26XXObjects[LPSTK_GPTIMER0], &gptimerCC26xxHWAttrs[LPSTK_GPTIMER0B], GPT_B },
517 { &gptimerCC26XXObjects[LPSTK_GPTIMER1], &gptimerCC26xxHWAttrs[LPSTK_GPTIMER1A], GPT_A },
518 { &gptimerCC26XXObjects[LPSTK_GPTIMER1], &gptimerCC26xxHWAttrs[LPSTK_GPTIMER1B], GPT_B },
519 { &gptimerCC26XXObjects[LPSTK_GPTIMER2], &gptimerCC26xxHWAttrs[LPSTK_GPTIMER2A], GPT_A },
520 { &gptimerCC26XXObjects[LPSTK_GPTIMER2], &gptimerCC26xxHWAttrs[LPSTK_GPTIMER2B], GPT_B },
521 { &gptimerCC26XXObjects[LPSTK_GPTIMER3], &gptimerCC26xxHWAttrs[LPSTK_GPTIMER3A], GPT_A },
522 { &gptimerCC26XXObjects[LPSTK_GPTIMER3], &gptimerCC26xxHWAttrs[LPSTK_GPTIMER3B], GPT_B },
523};
524
525/*
526 * =============================== I2C ===============================
527*/
528#include <ti/drivers/I2C.h>
529#include <ti/drivers/i2c/I2CCC26XX.h>
530
531#if TI_I2C_CONF_ENABLE
532
533I2CCC26XX_Object i2cCC26xxObjects[LPSTK_I2CCOUNT];
534
535const I2CCC26XX_HWAttrsV1 i2cCC26xxHWAttrs[LPSTK_I2CCOUNT] = {
536#if TI_I2C_CONF_I2C0_ENABLE
537 {
538 .baseAddr = I2C0_BASE,
539 .powerMngrId = PowerCC26XX_PERIPH_I2C0,
540 .intNum = INT_I2C_IRQ,
541 .intPriority = ~0,
542 .swiPriority = 0,
543 .sdaPin = LPSTK_I2C0_SDA0,
544 .sclPin = LPSTK_I2C0_SCL0,
545 },
546 {
547 .baseAddr = I2C0_BASE,
548 .powerMngrId = PowerCC26XX_PERIPH_I2C0,
549 .intNum = INT_I2C_IRQ,
550 .intPriority = ~0,
551 .swiPriority = 0,
552 .sdaPin = LPSTK_I2C0_SDA1,
553 .sclPin = LPSTK_I2C0_SCL1,
554 },
555#endif
556};
557
558const I2C_Config I2C_config[LPSTK_I2CCOUNT] = {
559#if TI_I2C_CONF_I2C0_ENABLE
560 {
561 .fxnTablePtr = &I2CCC26XX_fxnTable,
562 .object = &i2cCC26xxObjects[LPSTK_I2C0],
563 .hwAttrs = &i2cCC26xxHWAttrs[LPSTK_I2C0]
564 },
565 {
566 .fxnTablePtr = &I2CCC26XX_fxnTable,
567 .object = &i2cCC26xxObjects[LPSTK_I2C1],
568 .hwAttrs = &i2cCC26xxHWAttrs[LPSTK_I2C1]
569 },
570#endif
571};
572
573const uint_least8_t I2C_count = LPSTK_I2CCOUNT;
574
575#endif /* TI_I2C_CONF_ENABLE */
576
577/*
578 * =============================== I2S ===============================
579*/
580#include <ti/drivers/I2S.h>
581#include <ti/drivers/i2s/I2SCC26XX.h>
582
583I2SCC26XX_Object i2sCC26XXObjects[LPSTK_I2SCOUNT];
584
585const I2SCC26XX_HWAttrs i2sCC26XXHWAttrs[LPSTK_I2SCOUNT] = {
586 {
587 .pinSD1 = LPSTK_I2S_ADI,
588 .pinSD0 = LPSTK_I2S_ADO,
589 .pinSCK = LPSTK_I2S_BCLK,
590 .pinMCLK = LPSTK_I2S_MCLK,
591 .pinWS = LPSTK_I2S_WCLK,
592 .intPriority = ~0,
593 }
594};
595
596const I2S_Config I2S_config[LPSTK_I2SCOUNT] = {
597 {
598 .object = &i2sCC26XXObjects[LPSTK_I2S0],
599 .hwAttrs = &i2sCC26XXHWAttrs[LPSTK_I2S0]
600 },
601};
602
603const uint_least8_t I2S_count = LPSTK_I2SCOUNT;
604
605/*
606 * =============================== NVS ===============================
607 */
608#include <ti/drivers/NVS.h>
609#include <ti/drivers/nvs/NVSSPI25X.h>
610#include <ti/drivers/nvs/NVSCC26XX.h>
611
612#define NVS_REGIONS_BASE 0x48000
613#define SECTORSIZE 0x2000
614#define REGIONSIZE (SECTORSIZE * 4)
615
616#if TI_NVS_CONF_ENABLE
617
618#if TI_NVS_CONF_NVS_INTERNAL_ENABLE
619
620/*
621 * Reserve flash sectors for NVS driver use by placing an uninitialized byte
622 * array at the desired flash address.
623 */
624#if defined(__TI_COMPILER_VERSION__)
625
626/*
627 * Place uninitialized array at NVS_REGIONS_BASE
628 */
629#pragma LOCATION(flashBuf, NVS_REGIONS_BASE);
630#pragma NOINIT(flashBuf);
631static char flashBuf[REGIONSIZE];
632
633#elif defined(__IAR_SYSTEMS_ICC__)
634
635/*
636 * Place uninitialized array at NVS_REGIONS_BASE
637 */
638static __no_init char flashBuf[REGIONSIZE] @ NVS_REGIONS_BASE;
639
640#elif defined(__GNUC__)
641
642/*
643 * Place the flash buffers in the .nvs section created in the gcc linker file.
644 * The .nvs section enforces alignment on a sector boundary but may
645 * be placed anywhere in flash memory. If desired the .nvs section can be set
646 * to a fixed address by changing the following in the gcc linker file:
647 *
648 * .nvs (FIXED_FLASH_ADDR) (NOLOAD) : AT (FIXED_FLASH_ADDR) {
649 * *(.nvs)
650 * } > REGION_TEXT
651 */
652__attribute__ ((section (".nvs")))
653static char flashBuf[REGIONSIZE];
654
655#endif
656
657/* Allocate objects for NVS Internal Regions */
658NVSCC26XX_Object nvsCC26xxObjects[1];
659
660/* Hardware attributes for NVS Internal Regions */
661const NVSCC26XX_HWAttrs nvsCC26xxHWAttrs[1] = {
662 {
663 .regionBase = (void *)flashBuf,
664 .regionSize = REGIONSIZE,
665 },
666};
667
668#endif /* TI_NVS_CONF_NVS_INTERNAL_ENABLE */
669
670#if TI_NVS_CONF_NVS_EXTERNAL_ENABLE
671
672#define SPISECTORSIZE 0x1000
673#define SPIREGIONSIZE (SPISECTORSIZE * 32)
674#define VERIFYBUFSIZE 64
675
676static uint8_t verifyBuf[VERIFYBUFSIZE];
677
678/* Allocate objects for NVS External Regions */
679NVSSPI25X_Object nvsSPI25XObjects[1];
680
681/* Hardware attributes for NVS External Regions */
682const NVSSPI25X_HWAttrs nvsSPI25XHWAttrs[1] = {
683 {
684 .regionBaseOffset = 0,
685 .regionSize = SPIREGIONSIZE,
686 .sectorSize = SPISECTORSIZE,
687 .verifyBuf = verifyBuf,
688 .verifyBufSize = VERIFYBUFSIZE,
689 .spiHandle = NULL,
690 .spiIndex = 0,
691 .spiBitRate = 4000000,
692 .spiCsnGpioIndex = LPSTK_GPIO_SPI_FLASH_CS,
693 .statusPollDelayUs = 100,
694 },
695};
696
697#endif /* TI_NVS_CONF_NVS_EXTERNAL_ENABLE */
698
699/* NVS Region index 0 and 1 refer to NVS and NVS SPI respectively */
700const NVS_Config NVS_config[LPSTK_NVSCOUNT] = {
701#if TI_NVS_CONF_NVS_INTERNAL_ENABLE
702 {
703 .fxnTablePtr = &NVSCC26XX_fxnTable,
704 .object = &nvsCC26xxObjects[0],
705 .hwAttrs = &nvsCC26xxHWAttrs[0],
706 },
707#endif
708#if TI_NVS_CONF_NVS_EXTERNAL_ENABLE
709 {
710 .fxnTablePtr = &NVSSPI25X_fxnTable,
711 .object = &nvsSPI25XObjects[0],
712 .hwAttrs = &nvsSPI25XHWAttrs[0],
713 },
714#endif
715};
716
717const uint_least8_t NVS_count = LPSTK_NVSCOUNT;
718
719#endif /* TI_NVS_CONF_ENABLE */
720
721/*
722 * =============================== PIN ===============================
723 */
724#include <ti/drivers/PIN.h>
725#include <ti/drivers/pin/PINCC26XX.h>
726
727const PIN_Config BoardGpioInitTable[] = {
728
729 LPSTK_PIN_RLED | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX, /* LED initially off */
730 LPSTK_PIN_GLED | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX, /* LED initially off */
731 LPSTK_PIN_BTN1 | PIN_INPUT_EN | PIN_PULLUP | PIN_IRQ_BOTHEDGES | PIN_HYSTERESIS, /* Button is active low */
732 LPSTK_PIN_BTN2 | PIN_INPUT_EN | PIN_PULLUP | PIN_IRQ_BOTHEDGES | PIN_HYSTERESIS, /* Button is active low */
733 LPSTK_SPI_FLASH_CS | PIN_GPIO_OUTPUT_EN | PIN_GPIO_HIGH | PIN_PUSHPULL | PIN_DRVSTR_MIN, /* External flash chip select */
734 LPSTK_UART0_RX | PIN_INPUT_EN | PIN_PULLDOWN, /* UART RX via debugger back channel */
735 LPSTK_UART0_TX | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL, /* UART TX via debugger back channel */
736 LPSTK_SPI0_MOSI | PIN_INPUT_EN | PIN_PULLDOWN, /* SPI master out - slave in */
737 LPSTK_SPI0_MISO | PIN_INPUT_EN | PIN_PULLDOWN, /* SPI master in - slave out */
738 LPSTK_SPI0_CLK | PIN_INPUT_EN | PIN_PULLDOWN, /* SPI clock */
739 LPSTK_RELAY | PIN_INPUT_EN | PIN_PULLDOWN | PIN_IRQ_BOTHEDGES | PIN_HYSTERESIS, /* Relay is active high */
740 LPSTK_MPU_INT | PIN_INPUT_EN | PIN_PULLDOWN | PIN_IRQ_NEGEDGE | PIN_HYSTERESIS, /* MPU_INT is active low */
741 LPSTK_TMP_RDY | PIN_INPUT_EN | PIN_PULLUP | PIN_HYSTERESIS, /* TMP_RDY is active high */
742 LPSTK_BUZZER | PIN_GPIO_OUTPUT_EN | PIN_GPIO_LOW | PIN_PUSHPULL | PIN_DRVSTR_MAX, /* Buzzer initially off */
743 LPSTK_MPU_POWER | PIN_GPIO_OUTPUT_EN | PIN_GPIO_HIGH | PIN_PUSHPULL | PIN_DRVSTR_MAX, /* MPU initially on */
744
745 PIN_TERMINATE
746};
747
748const PINCC26XX_HWAttrs PINCC26XX_hwAttrs = {
749 .intPriority = ~0,
750 .swiPriority = 0
751};
752
753/*
754 * =============================== Power ===============================
755 */
756#include <ti/drivers/Power.h>
757#include <ti/drivers/power/PowerCC26X2.h>
758#include "clock-arch.h"
759
760const PowerCC26X2_Config PowerCC26X2_config = {
761 .policyInitFxn = NULL,
762 .policyFxn = &clock_arch_standby_policy,
763 .calibrateFxn = &PowerCC26XX_calibrate,
764 .enablePolicy = true,
765 .calibrateRCOSC_LF = true,
766 .calibrateRCOSC_HF = true,
767};
768
769/*
770 * =============================== PWM ===============================
771 * Remove unused entries to reduce flash usage both in Board.c and Board.h
772 */
773#include <ti/drivers/PWM.h>
774#include <ti/drivers/pwm/PWMTimerCC26XX.h>
775
776PWMTimerCC26XX_Object pwmtimerCC26xxObjects[LPSTK_PWMCOUNT];
777
778const PWMTimerCC26XX_HwAttrs pwmtimerCC26xxHWAttrs[LPSTK_PWMCOUNT] = {
779 { .pwmPin = LPSTK_PWMPIN0, .gpTimerUnit = LPSTK_GPTIMER0A },
780 { .pwmPin = LPSTK_PWMPIN1, .gpTimerUnit = LPSTK_GPTIMER0B },
781 { .pwmPin = LPSTK_PWMPIN2, .gpTimerUnit = LPSTK_GPTIMER1A },
782 { .pwmPin = LPSTK_PWMPIN3, .gpTimerUnit = LPSTK_GPTIMER1B },
783 { .pwmPin = LPSTK_PWMPIN4, .gpTimerUnit = LPSTK_GPTIMER2A },
784 { .pwmPin = LPSTK_PWMPIN5, .gpTimerUnit = LPSTK_GPTIMER2B },
785 { .pwmPin = LPSTK_PWMPIN6, .gpTimerUnit = LPSTK_GPTIMER3A },
786 { .pwmPin = LPSTK_PWMPIN7, .gpTimerUnit = LPSTK_GPTIMER3B },
787};
788
789const PWM_Config PWM_config[LPSTK_PWMCOUNT] = {
790 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[LPSTK_PWM0], &pwmtimerCC26xxHWAttrs[LPSTK_PWM0] },
791 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[LPSTK_PWM1], &pwmtimerCC26xxHWAttrs[LPSTK_PWM1] },
792 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[LPSTK_PWM2], &pwmtimerCC26xxHWAttrs[LPSTK_PWM2] },
793 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[LPSTK_PWM3], &pwmtimerCC26xxHWAttrs[LPSTK_PWM3] },
794 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[LPSTK_PWM4], &pwmtimerCC26xxHWAttrs[LPSTK_PWM4] },
795 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[LPSTK_PWM5], &pwmtimerCC26xxHWAttrs[LPSTK_PWM5] },
796 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[LPSTK_PWM6], &pwmtimerCC26xxHWAttrs[LPSTK_PWM6] },
797 { &PWMTimerCC26XX_fxnTable, &pwmtimerCC26xxObjects[LPSTK_PWM7], &pwmtimerCC26xxHWAttrs[LPSTK_PWM7] },
798};
799
800const uint_least8_t PWM_count = LPSTK_PWMCOUNT;
801
802/*
803 * =============================== RF Driver ===============================
804 */
805#include <ti/drivers/rf/RF.h>
806
807const RFCC26XX_HWAttrsV2 RFCC26XX_hwAttrs = {
808 .hwiPriority = ~0, /* Lowest HWI priority */
809 .swiPriority = 0, /* Lowest SWI priority */
810 .xoscHfAlwaysNeeded = true, /* Keep XOSC dependency while in standby */
811 .globalCallback = NULL, /* No board specific callback */
812 .globalEventMask = 0 /* No events subscribed to */
813};
814
815/*
816 * =============================== SD ===============================
817 */
818#include <ti/drivers/SD.h>
819#include <ti/drivers/sd/SDSPI.h>
820
821#if TI_SD_CONF_ENABLE
822
823#if !(TI_SPI_CONF_SPI0_ENABLE)
824#error "SD driver requires SPI0 enabled"
825#endif
826
827SDSPI_Object sdspiObjects[LPSTK_SDCOUNT];
828
829const SDSPI_HWAttrs sdspiHWAttrs[LPSTK_SDCOUNT] = {
830 {
831 .spiIndex = LPSTK_SPI0,
832 .spiCsGpioIndex = LPSTK_SDSPI_CS
833 }
834};
835
836const SD_Config SD_config[LPSTK_SDCOUNT] = {
837 {
838 .fxnTablePtr = &SDSPI_fxnTable,
839 .object = &sdspiObjects[LPSTK_SDSPI0],
840 .hwAttrs = &sdspiHWAttrs[LPSTK_SDSPI0]
841 },
842};
843
844const uint_least8_t SD_count = LPSTK_SDCOUNT;
845
846#endif /* TI_SD_CONF_ENABLE */
847
848/*
849 * =============================== SPI DMA ===============================
850 */
851#include <ti/drivers/SPI.h>
852#include <ti/drivers/spi/SPICC26X2DMA.h>
853
854#if TI_SPI_CONF_ENABLE
855
856SPICC26X2DMA_Object spiCC26X2DMAObjects[LPSTK_SPICOUNT];
857
858/*
859 * NOTE: The SPI instances below can be used by the SD driver to communicate
860 * with a SD card via SPI. The 'defaultTxBufValue' fields below are set to 0xFF
861 * to satisfy the SDSPI driver requirement.
862 */
863const SPICC26X2DMA_HWAttrs spiCC26X2DMAHWAttrs[LPSTK_SPICOUNT] = {
864#if TI_SPI_CONF_SPI0_ENABLE
865 {
866 .baseAddr = SSI0_BASE,
867 .intNum = INT_SSI0_COMB,
868 .intPriority = ~0,
869 .swiPriority = 0,
870 .powerMngrId = PowerCC26XX_PERIPH_SSI0,
871 .defaultTxBufValue = 0xFF,
872 .rxChannelBitMask = 1<<UDMA_CHAN_SSI0_RX,
873 .txChannelBitMask = 1<<UDMA_CHAN_SSI0_TX,
874 .mosiPin = LPSTK_SPI0_MOSI,
875 .misoPin = LPSTK_SPI0_MISO,
876 .clkPin = LPSTK_SPI0_CLK,
877 .csnPin = LPSTK_SPI0_CSN,
878 .minDmaTransferSize = 10
879 },
880#endif
881#if TI_SPI_CONF_SPI1_ENABLE
882 {
883 .baseAddr = SSI1_BASE,
884 .intNum = INT_SSI1_COMB,
885 .intPriority = ~0,
886 .swiPriority = 0,
887 .powerMngrId = PowerCC26XX_PERIPH_SSI1,
888 .defaultTxBufValue = 0xFF,
889 .rxChannelBitMask = 1<<UDMA_CHAN_SSI1_RX,
890 .txChannelBitMask = 1<<UDMA_CHAN_SSI1_TX,
891 .mosiPin = LPSTK_SPI1_MOSI,
892 .misoPin = LPSTK_SPI1_MISO,
893 .clkPin = LPSTK_SPI1_CLK,
894 .csnPin = LPSTK_SPI1_CSN,
895 .minDmaTransferSize = 10
896 },
897#endif
898};
899
900const SPI_Config SPI_config[LPSTK_SPICOUNT] = {
901#if TI_SPI_CONF_SPI0_ENABLE
902 {
903 .fxnTablePtr = &SPICC26X2DMA_fxnTable,
904 .object = &spiCC26X2DMAObjects[LPSTK_SPI0],
905 .hwAttrs = &spiCC26X2DMAHWAttrs[LPSTK_SPI0]
906 },
907#endif
908#if TI_SPI_CONF_SPI1_ENABLE
909 {
910 .fxnTablePtr = &SPICC26X2DMA_fxnTable,
911 .object = &spiCC26X2DMAObjects[LPSTK_SPI1],
912 .hwAttrs = &spiCC26X2DMAHWAttrs[LPSTK_SPI1]
913 },
914#endif
915};
916
917const uint_least8_t SPI_count = LPSTK_SPICOUNT;
918
919#endif /* TI_SPI_CONF_ENABLE */
920
921/*
922 * =============================== UART ===============================
923 */
924#include <ti/drivers/UART.h>
925#include <ti/drivers/uart/UARTCC26XX.h>
926
927#if TI_UART_CONF_ENABLE
928
929UARTCC26XX_Object uartCC26XXObjects[LPSTK_UARTCOUNT];
930
931uint8_t uartCC26XXRingBuffer[LPSTK_UARTCOUNT][32];
932
933const UARTCC26XX_HWAttrsV2 uartCC26XXHWAttrs[LPSTK_UARTCOUNT] = {
934#if TI_UART_CONF_UART0_ENABLE
935 {
936 .baseAddr = UART0_BASE,
937 .powerMngrId = PowerCC26XX_PERIPH_UART0,
938 .intNum = INT_UART0_COMB,
939 .intPriority = ~0,
940 .swiPriority = 0,
941 .txPin = LPSTK_UART0_TX,
942 .rxPin = LPSTK_UART0_RX,
943 .ctsPin = PIN_UNASSIGNED,
944 .rtsPin = PIN_UNASSIGNED,
945 .ringBufPtr = uartCC26XXRingBuffer[LPSTK_UART0],
946 .ringBufSize = sizeof(uartCC26XXRingBuffer[LPSTK_UART0]),
947 .txIntFifoThr = UARTCC26XX_FIFO_THRESHOLD_1_8,
948 .rxIntFifoThr = UARTCC26XX_FIFO_THRESHOLD_4_8,
949 .errorFxn = NULL
950 },
951#endif
952#if TI_UART_CONF_UART1_ENABLE
953 {
954 .baseAddr = UART1_BASE,
955 .powerMngrId = PowerCC26X2_PERIPH_UART1,
956 .intNum = INT_UART1_COMB,
957 .intPriority = ~0,
958 .swiPriority = 0,
959 .txPin = LPSTK_UART1_TX,
960 .rxPin = LPSTK_UART1_RX,
961 .ctsPin = PIN_UNASSIGNED,
962 .rtsPin = PIN_UNASSIGNED,
963 .ringBufPtr = uartCC26XXRingBuffer[LPSTK_UART1],
964 .ringBufSize = sizeof(uartCC26XXRingBuffer[LPSTK_UART1]),
965 .txIntFifoThr = UARTCC26XX_FIFO_THRESHOLD_1_8,
966 .rxIntFifoThr = UARTCC26XX_FIFO_THRESHOLD_4_8,
967 .errorFxn = NULL
968 },
969#endif
970};
971
972const UART_Config UART_config[LPSTK_UARTCOUNT] = {
973#if TI_UART_CONF_UART0_ENABLE
974 {
975 .fxnTablePtr = &UARTCC26XX_fxnTable,
976 .object = &uartCC26XXObjects[LPSTK_UART0],
977 .hwAttrs = &uartCC26XXHWAttrs[LPSTK_UART0]
978 },
979#endif
980#if TI_UART_CONF_UART1_ENABLE
981 {
982 .fxnTablePtr = &UARTCC26XX_fxnTable,
983 .object = &uartCC26XXObjects[LPSTK_UART1],
984 .hwAttrs = &uartCC26XXHWAttrs[LPSTK_UART1]
985 },
986#endif
987};
988
989const uint_least8_t UART_count = LPSTK_UARTCOUNT;
990
991#endif /* TI_UART_CONF_ENABLE */
992
993/*
994 * =============================== UDMA ===============================
995 */
996#include <ti/drivers/dma/UDMACC26XX.h>
997
998UDMACC26XX_Object udmaObjects[LPSTK_UDMACOUNT];
999
1000const UDMACC26XX_HWAttrs udmaHWAttrs[LPSTK_UDMACOUNT] = {
1001 {
1002 .baseAddr = UDMA0_BASE,
1003 .powerMngrId = PowerCC26XX_PERIPH_UDMA,
1004 .intNum = INT_DMA_ERR,
1005 .intPriority = ~0
1006 }
1007};
1008
1009const UDMACC26XX_Config UDMACC26XX_config[LPSTK_UDMACOUNT] = {
1010 {
1011 .object = &udmaObjects[LPSTK_UDMA0],
1012 .hwAttrs = &udmaHWAttrs[LPSTK_UDMA0]
1013 },
1014};
1015
1016
1017
1018/*
1019 * =============================== Watchdog ===============================
1020 */
1021#include <ti/drivers/Watchdog.h>
1022#include <ti/drivers/watchdog/WatchdogCC26XX.h>
1023
1024WatchdogCC26XX_Object watchdogCC26XXObjects[LPSTK_WATCHDOGCOUNT];
1025
1026const WatchdogCC26XX_HWAttrs watchdogCC26XXHWAttrs[LPSTK_WATCHDOGCOUNT] = {
1027 {
1028 .baseAddr = WDT_BASE,
1029 .reloadValue = 1000 /* Reload value in milliseconds */
1030 },
1031};
1032
1033const Watchdog_Config Watchdog_config[LPSTK_WATCHDOGCOUNT] = {
1034 {
1035 .fxnTablePtr = &WatchdogCC26XX_fxnTable,
1036 .object = &watchdogCC26XXObjects[LPSTK_WATCHDOG0],
1037 .hwAttrs = &watchdogCC26XXHWAttrs[LPSTK_WATCHDOG0]
1038 },
1039};
1040
1041const uint_least8_t Watchdog_count = LPSTK_WATCHDOGCOUNT;
1042
1043/*
1044 * Board-specific initialization function to disable external flash.
1045 * This function is defined in the file LPSTK_fxns.c
1046 */
1047extern void Board_initHook(void);
1048
1049/*
1050 * ======== LPSTK_initGeneral ========
1051 */
1052void LPSTK_initGeneral(void)
1053{
1054 Power_init();
1055
1056 if (PIN_init(BoardGpioInitTable) != PIN_SUCCESS) {
1057 /* Error with PIN_init */
1058 while (1);
1059 }
1060
1061 /* Perform board-specific initialization */
1062 Board_initHook();
1063}
1064
1065/*
1066 * ======== Board_init ========
1067 */
1068void Board_init(void)
1069{
1070 LPSTK_initGeneral();
1071}
===========================================================================
Header file for the CC13xx/CC26xx clock implementation.
void clock_arch_standby_policy(void)
Called by the Power driver when dropping to some low-power state.
Definition clock-arch.c:184
#define SSI1_BASE
Base address for SSI1.
Definition ssi.h:59
#define SSI0_BASE
Base address for SSI0.
Definition ssi.h:58